On Thu, 17 Mar 2022 23:52:34 -0500 Samuel Holland <sam...@sholland.org> wrote:
Hi, > Currently, clock/reset setup for this device is handled by a > platform-specific function and is intermixed with non-DM pinctrl > setup. Use the devicetree to get clocks/resets, which disentagles > it from the pinctrl setup in preparation for moving to DM_PINCTRL. > > Signed-off-by: Samuel Holland <sam...@sholland.org> No ability to test this, but it looks alright, and is robust against failures. Also we support the required clocks and resets in our clock driver, AFAICS. So: Reviewed-by: Andre Przywara <andre.przyw...@arm.com> Cheers, Andre > --- > > drivers/i2c/sun6i_p2wi.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/drivers/i2c/sun6i_p2wi.c b/drivers/i2c/sun6i_p2wi.c > index da7f540509..087c682a50 100644 > --- a/drivers/i2c/sun6i_p2wi.c > +++ b/drivers/i2c/sun6i_p2wi.c > @@ -14,10 +14,12 @@ > */ > > #include <axp_pmic.h> > +#include <clk.h> > #include <common.h> > #include <dm.h> > #include <errno.h> > #include <i2c.h> > +#include <reset.h> > #include <time.h> > #include <asm/io.h> > #include <asm/arch/cpu.h> > @@ -180,9 +182,19 @@ static int sun6i_p2wi_probe_chip(struct udevice *bus, > uint chip_addr, > static int sun6i_p2wi_probe(struct udevice *bus) > { > struct sun6i_p2wi_priv *priv = dev_get_priv(bus); > + struct reset_ctl *reset; > + struct clk *clk; > > priv->base = dev_read_addr_ptr(bus); > > + reset = devm_reset_control_get(bus, NULL); > + if (!IS_ERR(reset)) > + reset_deassert(reset); > + > + clk = devm_clk_get(bus, NULL); > + if (!IS_ERR(clk)) > + clk_enable(clk); > + > sun6i_p2wi_init(priv->base); > > return 0;