On Sun, 30 Jan 2022 15:27:12 +0100 Jernej Skrabec <jernej.skra...@gmail.com> wrote:
> During H616 boot0 blob and H6 boot0 sources analysis, I noticed that > SPL doesn't set resistor calibration and PLL LDO on H6. Tests didn't > show any observable difference, but nevertheless it's better to mimick > boot0 behaviour. > > In the process I also added names for few PRCM registers so it's > clearer what code does. > > Please take a look. All merged into sunxi/master, which already landed in mainline. Thanks! Andre > > Best regards, > Jernej > > Jernej Skrabec (3): > sunxi: prcm: Add a few registers > sunxi: clock: H6/H616: Add resistor calibration > sunxi: clock: H6: Adjust PLL LDO before clock setup > > arch/arm/include/asm/arch-sunxi/prcm_sun50i.h | 10 ++++++++++ > arch/arm/mach-sunxi/clock_sun50i_h6.c | 20 ++++++++++++++++--- > arch/arm/mach-sunxi/dram_sun50i_h6.c | 8 +++++--- > arch/arm/mach-sunxi/dram_sun50i_h616.c | 7 +++++-- > 4 files changed, 37 insertions(+), 8 deletions(-) >
