Replace CONFIG_ICACHE with a Kconfig option more limited in scope -
XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports
the "wic" (Write to Instruction Cache) instruction. It will be used to
guard "wic" invocations in microblaze cache code.
Signed-off-by: Ovidiu Panait <ovpan...@gmail.com>
---
arch/microblaze/Kconfig | 4 ----
arch/microblaze/cpu/cache.c | 6 +++---
board/xilinx/microblaze-generic/Kconfig | 7 +++++++
3 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 5a2e91104f..a25a95a013 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -25,10 +25,6 @@ config TARGET_MICROBLAZE_GENERIC
endchoice
-config ICACHE
- bool "Enable icache support"
- default y
-
source "board/xilinx/Kconfig"
source "board/xilinx/microblaze-generic/Kconfig"
diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c
index 4e8e228a22..b6bbc215b3 100644
--- a/arch/microblaze/cpu/cache.c
+++ b/arch/microblaze/cpu/cache.c
@@ -58,14 +58,14 @@ void flush_cache(ulong addr, ulong size)
{
int i;
for (i = 0; i < size; i += 4) {
- asm volatile (
-#ifdef CONFIG_ICACHE
+ if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WIC)) {
+ asm volatile (
"wic %0, r0;"
-#endif
"nop;"
:
: "r" (addr + i)
: "memory");
+ }
if (CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USE_WDC)) {
asm volatile (
diff --git a/board/xilinx/microblaze-generic/Kconfig
b/board/xilinx/microblaze-generic/Kconfig
index 0d756ac7ba..89af8d714f 100644
--- a/board/xilinx/microblaze-generic/Kconfig
+++ b/board/xilinx/microblaze-generic/Kconfig
@@ -70,4 +70,11 @@ config XILINX_MICROBLAZE0_USE_WDC
Enable this option if the MicroBlaze processor is configured with
support for the "wdc" (Write to Data Cache) instruction.
+config XILINX_MICROBLAZE0_USE_WIC
+ bool "MicroBlaze wic instruction support"
+ default y
+ help
+ Enable this option if the MicroBlaze processor is configured with
+ support for the "wic" (Write to Instruction Cache) instruction.
+
endif
--
2.25.1
