Enable DM_SERIAL for both U_Boot and the SPL. The uart2 and its pinmux
are already marked with u-boot,dm-spl but we need to move the call to
preloader_console_init() after spl_init() to avoid a board hang
as dm can't be used until after spl_init().

Remove the manual config of the UART pinmux now that it is no longer
needed.

Signed-off-by: Michael Trimarchi <mich...@amarulasolutions.com>
Cc: Tim Harvey <thar...@gateworks.com>
---
V1->V2:
        - Follow Tim Harvery suggestion on Peng change
        - Adjust the commit message as Tim
---
 board/bsh/imx8mn_smm_s2/spl.c          | 11 ++---------
 configs/imx8mn_bsh_smm_s2_defconfig    |  1 +
 configs/imx8mn_bsh_smm_s2pro_defconfig |  1 +
 3 files changed, 4 insertions(+), 9 deletions(-)

diff --git a/board/bsh/imx8mn_smm_s2/spl.c b/board/bsh/imx8mn_smm_s2/spl.c
index 5f04731d72..0f61acc630 100644
--- a/board/bsh/imx8mn_smm_s2/spl.c
+++ b/board/bsh/imx8mn_smm_s2/spl.c
@@ -40,14 +40,8 @@ void spl_board_init(void)
                puts("Failed to find clock node. Check device tree\n");
 }
 
-#define UART_PAD_CTRL  (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
 #define WDOG_PAD_CTRL  (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 
-static const iomux_v3_cfg_t uart_pads[] = {
-       IMX8MN_PAD_UART4_RXD__UART4_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-       IMX8MN_PAD_UART4_TXD__UART4_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
 static const iomux_v3_cfg_t wdog_pads[] = {
        IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
@@ -59,7 +53,6 @@ int board_early_init_f(void)
        imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
        set_wdog_reset(wdog);
 
-       imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
        init_uart_clk(3);
 
        if (IS_ENABLED(CONFIG_NAND_MXS)) {
@@ -82,14 +75,14 @@ void board_init_f(ulong dummy)
 
        timer_init();
 
-       preloader_console_init();
-
        ret = spl_init();
        if (ret) {
                debug("spl_init() failed: %d\n", ret);
                hang();
        }
 
+       preloader_console_init();
+
        /* DDR initialization */
        spl_dram_init();
 
diff --git a/configs/imx8mn_bsh_smm_s2_defconfig 
b/configs/imx8mn_bsh_smm_s2_defconfig
index 3d67079a46..e864685a62 100644
--- a/configs/imx8mn_bsh_smm_s2_defconfig
+++ b/configs/imx8mn_bsh_smm_s2_defconfig
@@ -80,6 +80,7 @@ CONFIG_SPL_DM_PMIC_BD71837=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_SERIAL=y
 CONFIG_MXC_UART=y
 CONFIG_SYSRESET=y
 CONFIG_SYSRESET_PSCI=y
diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig 
b/configs/imx8mn_bsh_smm_s2pro_defconfig
index c5809f5d4b..dfc9c93809 100644
--- a/configs/imx8mn_bsh_smm_s2pro_defconfig
+++ b/configs/imx8mn_bsh_smm_s2pro_defconfig
@@ -77,6 +77,7 @@ CONFIG_SPL_DM_PMIC_BD71837=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_SERIAL=y
 CONFIG_MXC_UART=y
 CONFIG_SYSRESET=y
 CONFIG_SYSRESET_PSCI=y
-- 
2.25.1

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