RNG Hardware error is reported due to incorrect entropy delay
rng self test are run to determine the correct ent_dly.
test is executed with different voltage and temperature to identify the
worst case value for ent_dly. after adding a margin value(1000),
ent_dly should be at least 12000.
Signed-off-by: Gaurav Jain <gaurav.j...@nxp.com>
---
drivers/crypto/fsl/jr.c | 11 ++++++++++-
include/fsl_sec.h | 6 +++++-
2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c
index 1d951cf0a6..85a3dac796 100644
--- a/drivers/crypto/fsl/jr.c
+++ b/drivers/crypto/fsl/jr.c
@@ -623,7 +623,7 @@ static void kick_trng(int ent_delay, ccsr_sec_t *sec)
static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec)
{
- int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN;
+ int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY;
struct rng4tst __iomem *rng =
(struct rng4tst __iomem *)&sec->rng;
u32 inst_handles;
@@ -652,6 +652,15 @@ static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec)
* the RNG.
*/
ret = instantiate_rng(sec_idx, sec, gen_sk);
+ /*
+ * entropy delay is calculated via self-test method.
+ * self-test are run across different volatge, temp.
+ * if worst case value for ent_dly is identified,
+ * loop can be skipped for that platform.
+ */
+ if (IS_ENABLED(CONFIG_MX6SX))
+ break;
+
} while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX));
if (ret) {
printf("SEC%u: Failed to instantiate RNG\n", sec_idx);
diff --git a/include/fsl_sec.h b/include/fsl_sec.h
index 7b6e3e2c20..d57c4ca820 100644
--- a/include/fsl_sec.h
+++ b/include/fsl_sec.h
@@ -48,7 +48,11 @@ struct rng4tst {
u32 rtmctl; /* misc. control register */
u32 rtscmisc; /* statistical check misc. register */
u32 rtpkrrng; /* poker range register */
-#define RTSDCTL_ENT_DLY_MIN 3200
+#ifdef CONFIG_MX6SX
+#define RTSDCTL_ENT_DLY 12000
+#else
+#define RTSDCTL_ENT_DLY 3200
+#endif
#define RTSDCTL_ENT_DLY_MAX 12800
union {
u32 rtpkrmax; /* PRGM=1: poker max. limit register */
--
2.25.1
