On 4/30/22 14:43, Peng Fan (OSS) wrote:
From: Peng Fan <peng....@nxp.com>
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
Signed-off-by: Peng Fan <peng....@nxp.com>
---
board/menlo/mx8menlo/mx8menlo.c | 9 ---------
configs/imx8mm-mx8menlo_defconfig | 1 +
include/configs/imx8mm-mx8menlo.h | 3 ---
3 files changed, 1 insertion(+), 12 deletions(-)
diff --git a/board/menlo/mx8menlo/mx8menlo.c b/board/menlo/mx8menlo/mx8menlo.c
index a4d0becdcc8..95ff95ad360 100644
--- a/board/menlo/mx8menlo/mx8menlo.c
+++ b/board/menlo/mx8menlo/mx8menlo.c
@@ -12,15 +12,8 @@
#include <asm/mach-imx/iomux-v3.h>
#include <spl.h>
-#define UART_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PE | PAD_CTL_DSE4)
#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
-/* Verdin UART_3, Console/Debug UART */
-static iomux_v3_cfg_t const uart_pads[] = {
- IMX8MM_PAD_SAI3_TXFS_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
- IMX8MM_PAD_SAI3_TXC_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
static iomux_v3_cfg_t const wdog_pads[] = {
IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
};
@@ -48,8 +41,6 @@ void board_early_init(void)
set_wdog_reset(wdog);
- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
-
init_uart_clk(1);
But that means the UART is available much later in SPL ?
Also, init_uart_clk(1) still hard-codes UART number , can the UART
driver init those UART clock instead too ?
