[PATCH 3/4] spi: synquacer: DMSTART bit must not be set while transferring

[Masahisa Kojima]

DMSTART bit must not be set while there is active transfer.
This commit sets the DMSTART bit only when the transfer begins.

Signed-off-by: Masahisa Kojima <masahisa.koj...@linaro.org>
Signed-off-by: Satoru Okamoto <okamoto.sat...@socionext.com>
---
 drivers/spi/spi-synquacer.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/spi-synquacer.c b/drivers/spi/spi-synquacer.c
index f1422cf893..5e1b3aedc7 100644
--- a/drivers/spi/spi-synquacer.c
+++ b/drivers/spi/spi-synquacer.c
@@ -330,9 +330,11 @@ static int synquacer_spi_xfer(struct udevice *dev, 
unsigned int bitlen,
        writel(~0, priv->base + RXC);
 
        /* Trigger */
-       val = readl(priv->base + DMSTART);
-       val |= BIT(TRIGGER);
-       writel(val, priv->base + DMSTART);
+       if (flags & SPI_XFER_BEGIN) {
+               val = readl(priv->base + DMSTART);
+               val |= BIT(TRIGGER);
+               writel(val, priv->base + DMSTART);
+       }
 
        while (busy & (BIT(RXBIT) | BIT(TXBIT))) {
                if (priv->rx_words)
-- 
2.17.1