On Mon, May 09, 2022 at 05:08:49PM +0100, Andre Przywara wrote: > The AArch64 TCR_ELx register is a 64-bit register, and many newer > architecture features use bits in the upper half. So far U-Boot was > igorant of those bits, trying to leave them alone. > However, in an effort to set bit 31 to 1, it failed doing so, because > the compiler sign-extended "1 << 31", so that all bits[63:31] got set. > > Older ARMv8.0 cores don't define anything dangerous up there, but newer > architecture revisions do, and setting all those bits will end badly: > ================= > $ qemu-system-aarch64 -cpu max .... > U-Boot 2022.07-rc1 (May 09 2022 - 15:21:00 +0100) > > DRAM: 1.5 GiB > ================= (hangs here) > > Defining TCR_ELx_RSVD to "1U << 31" avoids the sign-extension, so all > upper bits stay at a safe 0 value. This means no more surprises when > U-Boot runs on a more capable CPU core. > > Reported-by: Balaji Anandapadmanaban <balaji.anandapadmana...@arm.com> > Signed-off-by: Andre Przywara <andre.przyw...@arm.com> > Reviewed-by: Peng Fan <peng....@nxp.com> > Tested-by: Peter Collingbourne <p...@google.com> > Reviewed-by: Peter Collingbourne <p...@google.com>
Applied to u-boot/master, thanks! -- Tom
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