On 6/7/22 01:43, Alexander Graf wrote:
Now that we have a damage area tells us which parts of the frame buffer
actually need updating, let's only dcache flush those on video_sync()
calls. With this optimization in place, frame buffer updates - especially
on large screen such as 4k displays - speed up significantly.

Signed-off-by: Alexander Graf <ag...@csgraf.de>
Reported-by: Da Xue <da@libre.computer>
---
  drivers/video/video-uclass.c | 49 ++++++++++++++++++++++++++++++------
  1 file changed, 42 insertions(+), 7 deletions(-)

diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
index 9ac1974670..5661beea38 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
@@ -222,6 +222,39 @@ int video_damage(struct udevice *vid, int x, int y, int 
width, int height)
  }
  #endif
+#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)

Why should this be ARM specific?

Best regards

Heinrich

+static void video_flush_dcache(struct udevice *vid)
+{
+       struct video_priv *priv = dev_get_uclass_priv(vid);
+
+       if (!priv->flush_dcache)
+               return;
+
+#ifdef CONFIG_VIDEO_DAMAGE
+       if (priv->damage.endx && priv->damage.endy) {
+               int lstart = priv->damage.x * VNBYTES(priv->bpix);
+               int lend = priv->damage.endx * VNBYTES(priv->bpix);
+               int y;
+
+               for (y = priv->damage.y; y < priv->damage.endy; y++) {
+                       ulong fb = (ulong)priv->fb;
+                       ulong start = fb + (y * priv->line_length) + lstart;
+                       ulong end = start + lend;
+
+                       start = ALIGN_DOWN(start, CONFIG_SYS_CACHELINE_SIZE);
+                       end = ALIGN(end, CONFIG_SYS_CACHELINE_SIZE);
+
+                       flush_dcache_range(start, end);
+               }
+       }
+#else
+       flush_dcache_range((ulong)priv->fb,
+                          ALIGN((ulong)priv->fb + priv->fb_size,
+                                CONFIG_SYS_CACHELINE_SIZE));
+#endif
+}
+#endif
+
  /* Flush video activity to the caches */
  int video_sync(struct udevice *vid, bool force)
  {
@@ -240,13 +273,7 @@ int video_sync(struct udevice *vid, bool force)
         * out whether it exists? For now, ARM is safe.
         */
  #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
-       struct video_priv *priv = dev_get_uclass_priv(vid);
-
-       if (priv->flush_dcache) {
-               flush_dcache_range((ulong)priv->fb,
-                                  ALIGN((ulong)priv->fb + priv->fb_size,
-                                        CONFIG_SYS_CACHELINE_SIZE));
-       }
+       video_flush_dcache(vid);
  #elif defined(CONFIG_VIDEO_SANDBOX_SDL)
        struct video_priv *priv = dev_get_uclass_priv(vid);
        static ulong last_sync;
@@ -256,6 +283,14 @@ int video_sync(struct udevice *vid, bool force)
                last_sync = get_timer(0);
        }
  #endif
+
+#ifdef CONFIG_VIDEO_DAMAGE
+       struct video_priv *priv = dev_get_uclass_priv(vid);
+
+       priv->damage.endx = 0;
+       priv->damage.endy = 0;
+#endif
+
        return 0;
  }

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