On Fri, Jun 17, 2022 at 09:01:30AM +0000, Chee, Tien Fong wrote: > Hi Tom, > > Please pull the SoCFPGA changes as shown in below. > > Thanks. > > Best regards, > Tien Fong > > > The following changes since commit c18e5fb055ab789f58434e3cb432582adee0134c: > > dtoc: Update test_src_scan.py for new tegra compatibles (2022-06-14 > 13:59:23 -0400) > > are available in the Git repository at: > > https://github.com/tienfong/uboot_mainline.git > 32e0379143b433e29d76404f5f4c279067e48853 > > for you to fetch changes up to 32e0379143b433e29d76404f5f4c279067e48853: > > ddr: altera: soc64: Integer fix overflow that caused DDR size mismatched > (2022-06-17 16:27:05 +0800) >
Applied to u-boot/master, thanks! -- Tom
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