D1 has a register layout like A100 and H616, with the moved SIDDQ bit.
Unlike H616 it does not have any dependencies between PHY instances.

Signed-off-by: Samuel Holland <sam...@sholland.org>
---

 drivers/phy/allwinner/phy-sun4i-usb.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c 
b/drivers/phy/allwinner/phy-sun4i-usb.c
index 73e660edc37d..2e969ab91e35 100644
--- a/drivers/phy/allwinner/phy-sun4i-usb.c
+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
@@ -610,6 +610,15 @@ static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
        .phy0_dual_route = true,
 };
 
+static const struct sun4i_usb_phy_cfg sun20i_d1_cfg = {
+       .num_phys = 2,
+       .type = sun50i_h6_phy,
+       .phyctl_offset = REG_PHYCTL_A33,
+       .dedicated_clocks = true,
+       .hci_phy_ctl_clear = PHY_CTL_SIDDQ,
+       .phy0_dual_route = true,
+};
+
 static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = {
        .num_phys = 2,
        .type = sun50i_a64_phy,
@@ -641,6 +650,7 @@ static const struct udevice_id sun4i_usb_phy_ids[] = {
        { .compatible = "allwinner,sun8i-h3-usb-phy", .data = 
(ulong)&sun8i_h3_cfg },
        { .compatible = "allwinner,sun8i-r40-usb-phy", .data = 
(ulong)&sun8i_r40_cfg },
        { .compatible = "allwinner,sun8i-v3s-usb-phy", .data = 
(ulong)&sun8i_v3s_cfg },
+       { .compatible = "allwinner,sun20i-d1-usb-phy", .data = 
(ulong)&sun20i_d1_cfg },
        { .compatible = "allwinner,sun50i-a64-usb-phy", .data = 
(ulong)&sun50i_a64_cfg},
        { .compatible = "allwinner,sun50i-h6-usb-phy", .data = 
(ulong)&sun50i_h6_cfg},
        { }
-- 
2.35.1

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