From: Konstantin Porotchkin <kos...@marvell.com> Current pin control driver applies SDHCI PHY MUX selection when board DT calls for eMMC function on MPP wires. However, for CP side eMMC, only the "armada-8k-cpm-pinctrl" compatibility string is taken into account, which causes CP-SDHCI on Armada-7K boards to fail. This patch adds "armada-7k-pinctrl" compatibility string handling for the CP-SDHCI PHY configuration case.
Signed-off-by: Konstantin Porotchkin <kos...@marvell.com> Reviewed-by: Igal Liberman <ig...@marvell.com> --- drivers/pinctrl/mvebu/pinctrl-mvebu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c b/drivers/pinctrl/mvebu/pinctrl-mvebu.c index 536c6aff96e5..fd49a97b5b0a 100644 --- a/drivers/pinctrl/mvebu/pinctrl-mvebu.c +++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.c @@ -52,7 +52,9 @@ void mvebu_pinctl_emmc_set_mux(struct udevice *dev, u32 pin, u32 func) EMMC_PHY_CTRL_SDPHY_EN); } } else if (!fdt_node_check_compatible(blob, node, - "marvell,armada-8k-cpm-pinctrl")) { + "marvell,armada-8k-cpm-pinctrl") || + !fdt_node_check_compatible(blob, node, + "marvell,armada-7k-pinctrl")) { if ((pin == CP110_EMMC_CLK_PIN_ID) && (func == CP110_EMMC_CLK_FUNC)) { clrbits_le32(priv->base_reg + CP_EMMC_PHY_CTRL_REG, -- 2.20.1