Hi Stefano On Wed, Jul 27, 2022 at 5:02 PM Stefano Babic <sba...@denx.de> wrote: > > On 17.07.22 17:56, Michael Trimarchi wrote: > > Introduce BSH SystemMaster (SMM) M2 board family, which consists of: > > imx6ulz SMM M2 and imx6ulz SMM M2 PRO boards. > > > > Add support for imx6ulz BSH SMM M2 board: > > > > - 128 MiB DDR3 RAM > > - 256MiB Nand > > - USBOTG1 peripheral - fastboot. > > > include/configs/imx6ulz_smm_m2.h contains CONFIG_SYS_HZ that should go > to Kbuild (CI is broken), see: > > https://source.denx.de/u-boot/custodians/u-boot-imx/-/jobs/473514 >
I will re-send Michael > Regards, > Stefano > > > > > Signed-off-by: Michael Trimarchi <mich...@amarulasolutions.com> > > --- > > Changes V1->V2: > > - Adjust board due to the migrate CUSTOM_SYS_INIT_SP_ADDR to > > Kconfig using system-constants.h > > - Drop reference to freescale board in imx6ulz_smm_m2 include > > file > > --- > > arch/arm/dts/Makefile | 1 + > > arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi | 35 +++++ > > arch/arm/dts/imx6ulz-bsh-smm-m2.dts | 146 ++++++++++++++++++++ > > arch/arm/mach-imx/mx6/Kconfig | 12 ++ > > board/bsh/imx6ulz_smm_m2/Kconfig | 12 ++ > > board/bsh/imx6ulz_smm_m2/MAINTAINERS | 6 + > > board/bsh/imx6ulz_smm_m2/Makefile | 6 + > > board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c | 53 +++++++ > > board/bsh/imx6ulz_smm_m2/spl.c | 130 +++++++++++++++++ > > configs/imx6ulz_smm_m2_defconfig | 75 ++++++++++ > > include/configs/imx6ulz_smm_m2.h | 82 +++++++++++ > > 11 files changed, 558 insertions(+) > > create mode 100644 arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi > > create mode 100644 arch/arm/dts/imx6ulz-bsh-smm-m2.dts > > create mode 100644 board/bsh/imx6ulz_smm_m2/Kconfig > > create mode 100644 board/bsh/imx6ulz_smm_m2/MAINTAINERS > > create mode 100644 board/bsh/imx6ulz_smm_m2/Makefile > > create mode 100644 board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c > > create mode 100644 board/bsh/imx6ulz_smm_m2/spl.c > > create mode 100644 configs/imx6ulz_smm_m2_defconfig > > create mode 100644 include/configs/imx6ulz_smm_m2.h > > > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > > index 8f7ecfd0f6..4010ee435a 100644 > > --- a/arch/arm/dts/Makefile > > +++ b/arch/arm/dts/Makefile > > @@ -887,6 +887,7 @@ dtb-$(CONFIG_MX6ULL) += \ > > imx6ull-phytec-segin-ff-rdk-emmc.dtb \ > > imx6ull-dart-6ul.dtb \ > > imx6ull-somlabs-visionsom.dtb \ > > + imx6ulz-bsh-smm-m2.dtb \ > > imx6ulz-14x14-evk.dtb > > > > dtb-$(CONFIG_ARCH_MX6) += \ > > diff --git a/arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi > > b/arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi > > new file mode 100644 > > index 0000000000..75dbf6ed78 > > --- /dev/null > > +++ b/arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi > > @@ -0,0 +1,35 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Copyright (C) 2022 BSH Hausgeraete GmbH > > + * > > + * Author: Michael Trimarchi <mich...@amarulasolutions.com> > > + */ > > + > > +&{/soc} { > > + u-boot,dm-pre-reloc; > > +}; > > + > > +&aips2 { > > + u-boot,dm-pre-reloc; > > +}; > > + > > +&iomuxc { > > + u-boot,dm-pre-reloc; > > +}; > > + > > +&iomuxc_snvs { > > + u-boot,dm-pre-reloc; > > +}; > > + > > +&uart4 { > > + u-boot,dm-pre-reloc; > > +}; > > + > > +&pinctrl_uart4 { > > + u-boot,dm-pre-reloc; > > +}; > > + > > +&gpmi { > > + u-boot,dm-spl; > > + u-boot,dm-pre-reloc; > > +}; > > diff --git a/arch/arm/dts/imx6ulz-bsh-smm-m2.dts > > b/arch/arm/dts/imx6ulz-bsh-smm-m2.dts > > new file mode 100644 > > index 0000000000..59bcfc9a6b > > --- /dev/null > > +++ b/arch/arm/dts/imx6ulz-bsh-smm-m2.dts > > @@ -0,0 +1,146 @@ > > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > > +/* > > + * Copyright (C) 2021 BSH Hausgeraete GmbH > > + */ > > + > > +/dts-v1/; > > + > > +#include <dt-bindings/input/input.h> > > +#include "imx6ulz.dtsi" > > + > > +/ { > > + model = "BSH SMM M2"; > > + compatible = "bsh,imx6ulz-bsh-smm-m2", "fsl,imx6ull", "fsl,imx6ulz"; > > + > > + chosen { > > + stdout-path = &uart4; > > + }; > > + > > + usdhc2_pwrseq: usdhc2-pwrseq { > > + compatible = "mmc-pwrseq-simple"; > > + reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>; > > + }; > > +}; > > + > > +&gpmi { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_gpmi_nand>; > > + nand-on-flash-bbt; > > + status = "okay"; > > +}; > > + > > +&uart3 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_uart3>; > > + uart-has-rtscts; > > + status = "okay"; > > + > > + bluetooth { > > + compatible = "brcm,bcm4330-bt"; > > + max-speed = <3000000>; > > + shutdown-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; > > + device-wakeup-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>; > > + host-wakeup-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>; > > + }; > > +}; > > + > > +&uart4 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_uart4>; > > + status = "okay"; > > +}; > > + > > +&usbotg1 { > > + dr_mode = "peripheral"; > > + srp-disable; > > + hnp-disable; > > + adp-disable; > > + status = "okay"; > > +}; > > + > > +&usbphy1 { > > + fsl,tx-d-cal = <106>; > > +}; > > + > > +&usdhc2 { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_wlan>; > > + bus-width = <4>; > > + no-1-8-v; > > + non-removable; > > + cap-power-off-card; > > + keep-power-in-suspend; > > + cap-sdio-irq; > > + mmc-pwrseq = <&usdhc2_pwrseq>; > > + status = "okay"; > > + > > + brcmf: wifi@1 { > > + reg = <1>; > > + compatible = "brcm,bcm4329-fmac"; > > + interrupt-parent = <&gpio1>; > > + interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; > > + interrupt-names = "host-wake"; > > + }; > > +}; > > + > > +&wdog1 { > > + status = "okay"; > > +}; > > + > > +&iomuxc { > > + pinctrl_gpmi_nand: gpmi-nand { > > + fsl,pins = < > > + MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1 > > + MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1 > > + MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1 > > + MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000 > > + MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1 > > + MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1 > > + MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1 > > + MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1 > > + MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1 > > + MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1 > > + MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1 > > + MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1 > > + MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1 > > + MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1 > > + MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1 > > + >; > > + }; > > + > > + pinctrl_uart3: uart3grp { > > + fsl,pins = < > > + MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1 > > + MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b099 > > + MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1 > > + MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b099 > > + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x79 > > /* BT_REG_ON */ > > + MX6UL_PAD_SD1_CLK__GPIO2_IO17 0x100b1 > > /* BT_DEV_WAKE out */ > > + MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x1b0b0 > > /* BT_HOST_WAKE in */ > > + >; > > + }; > > + > > + pinctrl_uart4: uart4grp { > > + fsl,pins = < > > + MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1 > > + MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1 > > + >; > > + }; > > + > > + pinctrl_wlan: wlangrp { > > + fsl,pins = < > > + MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17059 > > + MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x10059 > > + MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17059 > > + MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17059 > > + MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17059 > > + MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17059 > > + MX6UL_PAD_SD1_DATA3__GPIO2_IO21 0x79 > > /* WL_REG_ON */ > > + MX6UL_PAD_UART2_CTS_B__GPIO1_IO22 0x100b1 > > /* WL_DEV_WAKE - WiFi_GPIO_4 - WiFi FW UART */ > > + MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b1 > > /* WL_HOST_WAKE - WIFI_GPIO_0 - OOB IRQ */ > > + MX6UL_PAD_ENET1_RX_EN__OSC32K_32K_OUT 0x4001b031 > > /* OSC 32Khz wifi clk in */ > > + >; > > + }; > > +}; > > diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig > > index eceb730856..28c6d05e2d 100644 > > --- a/arch/arm/mach-imx/mx6/Kconfig > > +++ b/arch/arm/mach-imx/mx6/Kconfig > > @@ -466,6 +466,17 @@ config TARGET_MX6ULL_14X14_EVK > > select DM_THERMAL > > imply CMD_DM > > > > +config TARGET_MX6ULZ_SMM_M2 > > + bool "Support imx6ulz_smm_m2" > > + depends on MX6ULL > > + select DM > > + select DM_GPIO > > + select DM_I2C > > + select DM_SERIAL > > + select DM_MTD > > + select DM_THERMAL > > + select SUPPORT_SPL > > + > > config TARGET_MYS_6ULX > > bool "MYiR MYS-6ULX" > > depends on MX6ULL > > @@ -685,6 +696,7 @@ source "board/ge/b1x5v2/Kconfig" > > source "board/aristainetos/Kconfig" > > source "board/armadeus/opos6uldev/Kconfig" > > source "board/boundary/nitrogen6x/Kconfig" > > +source "board/bsh/imx6ulz_smm_m2/Kconfig" > > source "board/bticino/mamoj/Kconfig" > > source "board/compulab/cm_fx6/Kconfig" > > source "board/dhelectronics/dh_imx6/Kconfig" > > diff --git a/board/bsh/imx6ulz_smm_m2/Kconfig > > b/board/bsh/imx6ulz_smm_m2/Kconfig > > new file mode 100644 > > index 0000000000..e38df7ce5c > > --- /dev/null > > +++ b/board/bsh/imx6ulz_smm_m2/Kconfig > > @@ -0,0 +1,12 @@ > > +if TARGET_MX6ULZ_SMM_M2 > > + > > +config SYS_BOARD > > + default "imx6ulz_smm_m2" > > + > > +config SYS_VENDOR > > + default "bsh" > > + > > +config SYS_CONFIG_NAME > > + default "imx6ulz_smm_m2" > > + > > +endif > > diff --git a/board/bsh/imx6ulz_smm_m2/MAINTAINERS > > b/board/bsh/imx6ulz_smm_m2/MAINTAINERS > > new file mode 100644 > > index 0000000000..8f3d79dbb8 > > --- /dev/null > > +++ b/board/bsh/imx6ulz_smm_m2/MAINTAINERS > > @@ -0,0 +1,6 @@ > > +MX6ULZ_SMM_M2 BOARD > > +M: Michael Trimarchi <mich...@amarulasolutions.com> > > +S: Maintained > > +F: board/bsh/mx6ulz_smm_m2/ > > +F: include/configs/imx6ulz_smm_m2.h > > +F: configs/imx6ulz_smm_m2_defconfig > > diff --git a/board/bsh/imx6ulz_smm_m2/Makefile > > b/board/bsh/imx6ulz_smm_m2/Makefile > > new file mode 100644 > > index 0000000000..b761bbb2f9 > > --- /dev/null > > +++ b/board/bsh/imx6ulz_smm_m2/Makefile > > @@ -0,0 +1,6 @@ > > +# SPDX-License-Identifier: GPL-2.0+ > > +# (C) Copyright 2021 Amarula Solutions B.V. > > + > > +obj-y := imx6ulz_smm_m2.o > > +obj-$(CONFIG_SPL_BUILD) += spl.o > > + > > diff --git a/board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c > > b/board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c > > new file mode 100644 > > index 0000000000..c82eabbfbe > > --- /dev/null > > +++ b/board/bsh/imx6ulz_smm_m2/imx6ulz_smm_m2.c > > @@ -0,0 +1,53 @@ > > +// SPDX-License-Identifier: GPL-2.0+ > > +/* > > + * > > + * Copyright (C) 2021 BSH Hausgeraete GmbH > > + */ > > + > > +#include <init.h> > > +#include <asm/arch/clock.h> > > +#include <asm/arch/iomux.h> > > +#include <asm/arch/imx-regs.h> > > +#include <asm/arch/crm_regs.h> > > +#include <asm/arch/mx6-pins.h> > > +#include <asm/arch/sys_proto.h> > > +#include <asm/mach-imx/boot_mode.h> > > +#include <asm/global_data.h> > > +#include <asm/gpio.h> > > +#include <common.h> > > +#include <env.h> > > +#include <linux/sizes.h> > > + > > +static void setup_gpmi_nand(void) > > +{ > > + setup_gpmi_io_clk((MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) | > > + MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) | > > + MXC_CCM_CS2CDR_ENFC_CLK_SEL(3))); > > +}; > > + > > +int dram_init(void) > > +{ > > + gd->ram_size = imx_ddr_size(); > > + > > + return 0; > > +} > > + > > +int board_init(void) > > +{ > > + /* Address of boot parameters */ > > + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; > > + > > + setup_gpmi_nand(); > > + > > + return 0; > > +} > > + > > +int board_late_init(void) > > +{ > > + if (is_boot_from_usb()) { > > + env_set("bootcmd", "run bootcmd_mfg"); > > + env_set("bootdelay", "0"); > > + } > > + > > + return 0; > > +} > > diff --git a/board/bsh/imx6ulz_smm_m2/spl.c b/board/bsh/imx6ulz_smm_m2/spl.c > > new file mode 100644 > > index 0000000000..a524e7f225 > > --- /dev/null > > +++ b/board/bsh/imx6ulz_smm_m2/spl.c > > @@ -0,0 +1,130 @@ > > +// SPDX-License-Identifier: GPL-2.0+ > > + > > +#include <common.h> > > +#include <cpu_func.h> > > +#include <hang.h> > > +#include <init.h> > > +#include <asm/arch/clock.h> > > +#include <asm/arch/iomux.h> > > +#include <asm/arch/imx-regs.h> > > +#include <asm/arch/crm_regs.h> > > +#include <asm/arch/mx6ull_pins.h> > > +#include <asm/arch/mx6-pins.h> > > +#include <asm/arch/sys_proto.h> > > +#include <asm/gpio.h> > > +#include <asm/mach-imx/iomux-v3.h> > > +#include <asm/mach-imx/boot_mode.h> > > +#include <linux/libfdt.h> > > +#include <spl.h> > > +#include <asm/arch/mx6-ddr.h> > > + > > +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ > > + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ > > + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) > > + > > +static iomux_v3_cfg_t const uart4_pads[] = { > > + MX6_PAD_UART4_TX_DATA__UART4_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), > > + MX6_PAD_UART4_RX_DATA__UART4_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), > > +}; > > + > > +static void setup_iomux_uart(void) > > +{ > > + imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); > > +} > > + > > +static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = { > > + .grp_addds = 0x00000028, > > + .grp_ddrmode_ctl = 0x00020000, > > + .grp_b0ds = 0x00000028, > > + .grp_ctlds = 0x00000028, > > + .grp_b1ds = 0x00000028, > > + .grp_ddrpke = 0x00000000, > > + .grp_ddrmode = 0x00020000, > > + .grp_ddr_type = 0x000c0000, > > +}; > > + > > +static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = { > > + .dram_dqm0 = 0x00000028, > > + .dram_dqm1 = 0x00000028, > > + .dram_ras = 0x00000028, > > + .dram_cas = 0x00000028, > > + .dram_odt0 = 0x00000028, > > + .dram_odt1 = 0x00000028, > > + .dram_sdba2 = 0x00000000, > > + .dram_sdclk_0 = 0x00000028, > > + .dram_sdqs0 = 0x00000028, > > + .dram_sdqs1 = 0x00000028, > > + .dram_reset = 0x000c0028, > > +}; > > + > > +static struct mx6_mmdc_calibration mx6_mmcd_calib = { > > + .p0_mpwldectrl0 = 0x00000000, > > + .p0_mpwldectrl1 = 0x00100010, > > + .p0_mpdgctrl0 = 0x414c014c, > > + .p0_mpdgctrl1 = 0x00000000, > > + .p0_mprddlctl = 0x40403a42, > > + .p0_mpwrdlctl = 0x4040342e, > > +}; > > + > > +static struct mx6_ddr_sysinfo ddr_sysinfo = { > > + .dsize = 0, > > + .cs1_mirror = 0, > > + .cs_density = 32, > > + .ncs = 1, > > + .bi_on = 1, > > + .rtt_nom = 1, > > + .rtt_wr = 0, > > + .ralat = 5, > > + .walat = 1, > > + .mif3_mode = 3, > > + .rst_to_cke = 0x23, /* 33 cycles (JEDEC value for DDR3) - > > total of 500 us */ > > + .sde_to_rst = 0x10, /* 14 cycles (JEDEC value for DDR3) - > > total of 200 us */ > > + .refsel = 1, > > + .refr = 3, > > +}; > > + > > +static struct mx6_ddr3_cfg mem_ddr = { > > + .mem_speed = 1333, > > + .density = 2, > > + .width = 16, > > + .banks = 8, > > + .rowaddr = 13, > > + .coladdr = 10, > > + .pagesz = 2, > > + .trcd = 1350, > > + .trcmin = 4950, > > + .trasmin = 3600, > > +}; > > + > > +static void ccgr_init(void) > > +{ > > + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; > > + > > + writel(0xFFFFFFFF, &ccm->CCGR0); > > + writel(0xFFFFFFFF, &ccm->CCGR1); > > + writel(0xFFFFFFFF, &ccm->CCGR2); > > + writel(0xFFFFFFFF, &ccm->CCGR3); > > + writel(0xFFFFFFFF, &ccm->CCGR4); > > + writel(0xFFFFFFFF, &ccm->CCGR5); > > + writel(0xFFFFFFFF, &ccm->CCGR6); > > +} > > + > > +static void imx6ul_spl_dram_cfg(void) > > +{ > > + mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); > > + mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); > > +} > > + > > +void board_init_f(ulong dummy) > > +{ > > + ccgr_init(); > > + arch_cpu_init(); > > + timer_init(); > > + setup_iomux_uart(); > > + preloader_console_init(); > > + imx6ul_spl_dram_cfg(); > > +} > > + > > +void reset_cpu(void) > > +{ > > +} > > diff --git a/configs/imx6ulz_smm_m2_defconfig > > b/configs/imx6ulz_smm_m2_defconfig > > new file mode 100644 > > index 0000000000..b1daef8d75 > > --- /dev/null > > +++ b/configs/imx6ulz_smm_m2_defconfig > > @@ -0,0 +1,75 @@ > > +CONFIG_ARM=y > > +CONFIG_ARCH_MX6=y > > +CONFIG_SYS_TEXT_BASE=0x87800000 > > +CONFIG_SYS_MALLOC_LEN=0x1000000 > > +CONFIG_SPL_GPIO=y > > +CONFIG_SPL_LIBCOMMON_SUPPORT=y > > +CONFIG_SPL_LIBGENERIC_SUPPORT=y > > +CONFIG_NR_DRAM_BANKS=1 > > +CONFIG_ENV_SIZE=0x20000 > > +CONFIG_ENV_OFFSET=0x400000 > > +CONFIG_MX6ULL=y > > +CONFIG_TARGET_MX6ULZ_SMM_M2=y > > +CONFIG_DEFAULT_DEVICE_TREE="imx6ulz-bsh-smm-m2" > > +CONFIG_SPL_TEXT_BASE=0x00908000 > > +CONFIG_SPL_SERIAL=y > > +CONFIG_SPL=y > > +CONFIG_DISTRO_DEFAULTS=y > > +CONFIG_FIT=y > > +CONFIG_FIT_SIGNATURE=y > > +CONFIG_FIT_VERBOSE=y > > +CONFIG_LEGACY_IMAGE_FORMAT=y > > +CONFIG_BOOTDELAY=3 > > +CONFIG_BOARD_LATE_INIT=y > > +CONFIG_SPL_DMA=y > > +CONFIG_SPL_MTD_SUPPORT=y > > +CONFIG_SPL_NAND_SUPPORT=y > > +CONFIG_SPL_USB_HOST=y > > +CONFIG_SPL_USB_GADGET=y > > +CONFIG_SPL_USB_SDP_SUPPORT=y > > +CONFIG_SPL_WATCHDOG=y > > +CONFIG_CMD_DM=y > > +CONFIG_CMD_GPIO=y > > +CONFIG_CMD_I2C=y > > +CONFIG_CMD_USB=y > > +CONFIG_CMD_USB_SDP=y > > +CONFIG_CMD_CACHE=y > > +CONFIG_CMD_MTDPARTS=y > > +CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" > > +CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:4m(nandboot),1m(env),8m(kernel),1m(nanddtb),-(rootfs)" > > +CONFIG_CMD_UBI=y > > +# CONFIG_ISO_PARTITION is not set > > +CONFIG_OF_CONTROL=y > > +CONFIG_ENV_OVERWRITE=y > > +CONFIG_ENV_IS_IN_NAND=y > > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y > > +# CONFIG_NET is not set > > +CONFIG_BOUNCE_BUFFER=y > > +CONFIG_USB_FUNCTION_FASTBOOT=y > > +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 > > +CONFIG_FASTBOOT_FLASH=y > > +CONFIG_FASTBOOT_UUU_SUPPORT=y > > +CONFIG_FASTBOOT_FLASH_NAND=y > > +CONFIG_SYS_I2C_MXC=y > > +# CONFIG_MMC is not set > > +CONFIG_MTD=y > > +CONFIG_MTD_RAW_NAND=y > > +CONFIG_NAND_MXS=y > > +CONFIG_SYS_NAND_ONFI_DETECTION=y > > +CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y > > +CONFIG_SYS_NAND_U_BOOT_OFFS=0x111400 > > +CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x291400 > > +CONFIG_PINCTRL=y > > +CONFIG_PINCTRL_IMX6=y > > +CONFIG_DM_PMIC=y > > +CONFIG_DM_REGULATOR=y > > +CONFIG_DM_REGULATOR_FIXED=y > > +CONFIG_MXC_UART=y > > +CONFIG_IMX_THERMAL=y > > +CONFIG_USB=y > > +CONFIG_USB_GADGET=y > > +CONFIG_USB_GADGET_MANUFACTURER="BSH" > > +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > > +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > > +CONFIG_CI_UDC=y > > +CONFIG_SDP_LOADADDR=0x877fffc0 > > diff --git a/include/configs/imx6ulz_smm_m2.h > > b/include/configs/imx6ulz_smm_m2.h > > new file mode 100644 > > index 0000000000..8f5450c74e > > --- /dev/null > > +++ b/include/configs/imx6ulz_smm_m2.h > > @@ -0,0 +1,82 @@ > > +/* SPDX-License-Identifier: GPL-2.0+ */ > > +/* > > + * Copyright (C) 2021 Amarula Solutions B.V. > > + * > > + */ > > +#ifndef __IMX6ULZ_SMM_M2_CONFIG_H > > +#define __IMX6ULZ_SMM_M2_CONFIG_H > > + > > +#include "mx6_common.h" > > + > > +#include <asm/arch/imx-regs.h> > > +#include <linux/sizes.h> > > +#include <linux/stringify.h> > > + > > +/* SPL options */ > > +#include "imx6_spl.h" > > + > > +#define CONFIG_MXC_UART_BASE UART4_BASE > > + > > +#ifndef CONFIG_SPL_BUILD > > + > > +#define BOOT_TARGET_DEVICES(func) \ > > + func(NAND, nand, 0) \ > > + > > +#include <config_distro_bootcmd.h> > > + > > +#endif /* !CONFIG_SPL_BUILD */ > > + > > +#define MEM_LAYOUT_ENV_SETTINGS \ > > + "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ > > + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ > > + "ramdisk_addr_r=0x43800000\0" \ > > + "fdt_addr_r=0x43000000\0" \ > > + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ > > + "bootcmd_mfg=echo Running fastboot mode; fastboot usb 0\0" \ > > + > > +#define NANDARGS \ > > + "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ > > + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ > > + "nandargs=setenv bootargs " \ > > + "${optargs} " \ > > + "mtdparts=${mtdparts} " \ > > + "root=${nandroot} " \ > > + "rootfstype=${nandrootfstype}\0" \ > > + "nandroot=ubi0:root rw ubi.mtd=nandrootfs\0" \ > > + "nandrootfstype=ubifs rootwait=1\0" \ > > + "nandboot=echo Booting from nand ...; " \ > > + "run nandargs; " \ > > + "nand read ${fdt_addr_r} nanddtb; " \ > > + "nand read ${loadaddr} nandkernel; " \ > > + "booti ${loadaddr} - ${fdt_addr_r}\0" > > + > > +#define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \ > > + "bootcmd_" #devtypel #instance "=" \ > > + "run nandboot\0" > > + > > +#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \ > > + #devtypel #instance " " > > + > > +/* Initial environment variables */ > > +#define CONFIG_EXTRA_ENV_SETTINGS \ > > + MEM_LAYOUT_ENV_SETTINGS \ > > + NANDARGS \ > > + BOOTENV > > + > > +/* Miscellaneous configurable options */ > > +#define CONFIG_SYS_HZ 1000 > > + > > +/* Physical Memory Map */ > > +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR > > +#define PHYS_SDRAM_SIZE SZ_128M > > + > > +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM > > +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR > > +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE > > + > > +/* NAND */ > > +#define CONFIG_SYS_MAX_NAND_DEVICE 1 > > + > > +#define CONFIG_SYS_NAND_BASE 0x20000000 > > + > > +#endif > > > -- > ===================================================================== > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, 82194 Groebenzell, Germany > Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de > ===================================================================== -- Michael Nazzareno Trimarchi Co-Founder & Chief Executive Officer M. +39 347 913 2170 mich...@amarulasolutions.com __________________________________ Amarula Solutions BV Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 i...@amarulasolutions.com www.amarulasolutions.com