On 05.08.22 16:03, Pali Rohár wrote:
Release PERST# signal via GPIO when "reset-gpios" is defined in device tree.
Signed-off-by: Pali Rohár <p...@kernel.org>
Reviewed-by: Stefan Roese <s...@denx.de>
Applied to u-boot-marvell/master
Thanks,
Stefan
---
Changes in v2:
* select DM_GPIO
* use asm/gpio.h
---
drivers/pci/Kconfig | 1 +
drivers/pci/pci_mvebu.c | 14 ++++++++++++++
2 files changed, 15 insertions(+)
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 436acca898e4..22f4995453ed 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -301,6 +301,7 @@ config PCI_MVEBU
depends on (ARCH_KIRKWOOD || ARCH_MVEBU)
select MISC
select DM_RESET
+ select DM_GPIO
help
Say Y here if you want to enable PCIe controller support on
Kirkwood and Armada 370/XP/375/38x SoCs.
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index d80f87e0cfc6..5bd340a421b8 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -22,6 +22,7 @@
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
+#include <asm/gpio.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/errno.h>
@@ -60,6 +61,7 @@ struct mvebu_pcie {
struct resource mem;
void __iomem *iobase;
struct resource io;
+ struct gpio_desc reset_gpio;
u32 intregs;
u32 port;
u32 lane;
@@ -416,6 +418,14 @@ static int mvebu_pcie_probe(struct udevice *dev)
struct udevice *ctlr = pci_get_controller(dev);
struct pci_controller *hose = dev_get_uclass_priv(ctlr);
u32 reg;
+ int ret;
+
+ /* Request for optional PERST# GPIO */
+ ret = gpio_request_by_name(dev, "reset-gpios", 0, &pcie->reset_gpio,
GPIOD_IS_OUT);
+ if (ret && ret != -ENOENT) {
+ printf("%s: unable to request reset-gpios: %d\n", pcie->name,
ret);
+ return ret;
+ }
/*
* Change Class Code of PCI Bridge device to PCI Bridge (0x600400)
@@ -537,6 +547,10 @@ static int mvebu_pcie_probe(struct udevice *dev)
pcie->cfgcache[(PCI_PREF_MEMORY_BASE - 0x10) / 4] =
PCI_PREF_RANGE_TYPE_64 | (PCI_PREF_RANGE_TYPE_64 << 16);
+ /* Release PERST# via GPIO when it was defined */
+ if (dm_gpio_is_valid(&pcie->reset_gpio))
+ dm_gpio_set_value(&pcie->reset_gpio, 0);
+
mvebu_pcie_wait_for_link(pcie);
return 0;
Viele Grüße,
Stefan Roese
--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
