On 08.09.22 16:06, Marek Behún wrote:
From: Pali Rohár <p...@kernel.org>Commit c86d53fd88df ("arm: mvebu: Don't disable cache at startup on Armada XP at all") introduced branch for non-AXP code which was guarded by A38X condition. Fix this issue by checking for AXP platform, not by A38X. Fixes: c86d53fd88df ("arm: mvebu: Don't disable cache at startup on Armada XP at all") Signed-off-by: Pali Rohár <p...@kernel.org> Signed-off-by: Marek Behún <ka...@kernel.org>
Reviewed-by: Stefan Roese <s...@denx.de> Thanks, Stefan
--- arch/arm/mach-mvebu/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index b512ccc501..8e5d1ba21e 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -448,7 +448,7 @@ int arch_cpu_init(void) struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE;- if (IS_ENABLED(CONFIG_ARMADA_38X)) {+ if (!IS_ENABLED(CONFIG_ARMADA_XP)) { /* * To fully release / unlock this area from cache, we need * to flush all caches and disable the L2 cache.
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