From: Tien Fong Chee <tien.fong.c...@intel.com>

Unexpected behavior and error can occur if FPGA is accessed in unknown
state.Always checking with FPGA in user mode is required to ensure
system stability.

Signed-off-by: Tien Fong Chee <tien.fong.c...@intel.com>
Signed-off-by: Teik Heng Chong <teik.heng.ch...@intel.com>
---
 arch/arm/mach-socfpga/misc_arria10.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-socfpga/misc_arria10.c 
b/arch/arm/mach-socfpga/misc_arria10.c
index 7ce888d197..89298f5d4d 100644
--- a/arch/arm/mach-socfpga/misc_arria10.c
+++ b/arch/arm/mach-socfpga/misc_arria10.c
@@ -13,6 +13,7 @@
 #include <ns16550.h>
 #include <spi_flash.h>
 #include <watchdog.h>
+#include <asm/arch/fpga_manager.h>
 #include <asm/arch/misc.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/reset_manager.h>
@@ -126,10 +127,16 @@ int print_cpuinfo(void)
 
 void do_bridge_reset(int enable, unsigned int mask)
 {
-       if (enable)
-               socfpga_reset_deassert_bridges_handoff();
-       else
+       if (enable) {
+               if (is_fpgamgr_user_mode()) {
+                       socfpga_reset_deassert_bridges_handoff();
+               } else {
+                       puts("Bridges: Failed to enable because FPGA is not ");
+                       puts("in user mode\n");
+               }
+       } else {
                socfpga_bridges_reset();
+       }
 }
 
 /*
-- 
2.25.1

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