The uart1 node was missing the 'clock-frequency' property. This meant
the driver for this device would fail at probe.
The clock for uart1 is fed from the same source as uart0 and is a fixed
200MHz clock. This is confirmed via documentation for the CN9130 SoC
and from the equivalent code in Linux at:
<linux>/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
where uart0 and uart1 share a common 'clocks' definition.
Signed-off-by: Hamish Martin <hamish.mar...@alliedtelesis.co.nz>
---
arch/arm/dts/armada-ap80x.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/armada-ap80x.dtsi b/arch/arm/dts/armada-ap80x.dtsi
index 8787a872d85e..ab3c32e0e586 100644
--- a/arch/arm/dts/armada-ap80x.dtsi
+++ b/arch/arm/dts/armada-ap80x.dtsi
@@ -181,7 +181,7 @@
reg-io-width = <1>;
clocks = <&ap_syscon 3>;
status = "disabled";
-
+ clock-frequency = <200000000>;
};
watchdog: watchdog@610000 {
--
2.37.3
