Re: [PATCH v2 2/4] watchdog: ulp_wdog: Update watchdog driver for imx93

[Stefan Roese]

On 21.10.22 10:41, Alice Guo (OSS) wrote:

From: Alice Guo <alice....@nxp.com>

The WDOG clocks are sourced from the fixed 32KHz (lpo_clk).When the
timeout period exceeds 2 seconds, the value written to the TOVAL
register is larger than 16-bit can represent. Enabling watchdog
prescaler to solve this problem.

Signed-off-by: Alice Guo <alice....@nxp.com>

Reviewed-by: Stefan Roese <s...@denx.de>

Thanks,
Stefan

---

Changes for v2:
  use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef'

  drivers/watchdog/ulp_wdog.c | 15 ++++++++++++---
  1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/watchdog/ulp_wdog.c b/drivers/watchdog/ulp_wdog.c
index 820da0f9dd..17778587ee 100644
--- a/drivers/watchdog/ulp_wdog.c
+++ b/drivers/watchdog/ulp_wdog.c
@@ -36,6 +36,7 @@ struct wdog_regs {

#define WDGCS_RCS BIT(10)

  #define WDGCS_ULK                       BIT(11)
+#define WDOG_CS_PRES                    BIT(12)
  #define WDGCS_CMD32EN                   BIT(13)
  #define WDGCS_FLG                       BIT(14)

@@ -89,7 +90,12 @@ void hw_watchdog_init(void)

        writel(0, &wdog->win);

/* setting 1-kHz clock source, enable counter running, and clear interrupt */

-       writel((cmd32 | WDGCS_WDGE | WDGCS_WDGUPDATE | (WDG_LPO_CLK << 8) | 
WDGCS_FLG), &wdog->cs);
+       if (IS_ENABLED(CONFIG_ARCH_IMX9))
+               writel((cmd32 | WDGCS_WDGE | WDGCS_WDGUPDATE | (WDG_LPO_CLK << 
8) |
+                      WDGCS_FLG | WDOG_CS_PRES), &wdog->cs);
+       else
+               writel((cmd32 | WDGCS_WDGE | WDGCS_WDGUPDATE | (WDG_LPO_CLK << 
8) |
+                      WDGCS_FLG), &wdog->cs);

/* Wait WDOG reconfiguration */

        while (!(readl(&wdog->cs) & WDGCS_RCS))
@@ -117,11 +123,14 @@ void reset_cpu(void)
        while (!(readl(&wdog->cs) & WDGCS_ULK))
                ;

- hw_watchdog_set_timeout(5); /* 5ms timeout */

+       hw_watchdog_set_timeout(5); /* 5ms timeout for general; 40ms timeout 
for imx93 */
        writel(0, &wdog->win);

/* enable counter running */

-       writel((cmd32 | WDGCS_WDGE | (WDG_LPO_CLK << 8)), &wdog->cs);
+       if (IS_ENABLED(CONFIG_ARCH_IMX9))
+               writel((cmd32 | WDGCS_WDGE | (WDG_LPO_CLK << 8) | WDOG_CS_PRES), 
&wdog->cs);
+       else
+               writel((cmd32 | WDGCS_WDGE | (WDG_LPO_CLK << 8)), &wdog->cs);

/* Wait WDOG reconfiguration */

        while (!(readl(&wdog->cs) & WDGCS_RCS))

Viele Grüße,
Stefan Roese

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Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de