Perform a simple rename of CONFIG_SH_ETHER_CACHE_INVALIDATE to
CFG_SH_ETHER_CACHE_INVALIDATE
Signed-off-by: Tom Rini <tr...@konsulko.com>
---
drivers/net/sh_eth.c | 2 +-
include/configs/alt.h | 2 +-
include/configs/condor.h | 2 +-
include/configs/gose.h | 2 +-
include/configs/grpeach.h | 2 +-
include/configs/koelsch.h | 2 +-
include/configs/lager.h | 2 +-
include/configs/porter.h | 2 +-
include/configs/silk.h | 2 +-
include/configs/stout.h | 2 +-
10 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 90e47d93aada..63b21969d5cc 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -46,7 +46,7 @@
#define flush_cache_wback(...)
#endif
-#if defined(CONFIG_SH_ETHER_CACHE_INVALIDATE) && defined(CONFIG_ARM)
+#if defined(CFG_SH_ETHER_CACHE_INVALIDATE) && defined(CONFIG_ARM)
#define invalidate_cache(addr, len) \
{ \
unsigned long line_size = CFG_SH_ETHER_ALIGNE_SIZE; \
diff --git a/include/configs/alt.h b/include/configs/alt.h
index f06ceed47f0c..7a29157ef440 100644
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -25,7 +25,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/condor.h b/include/configs/condor.h
index 6d7c788163d3..fa3edef9b300 100644
--- a/include/configs/condor.h
+++ b/include/configs/condor.h
@@ -18,7 +18,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/gose.h b/include/configs/gose.h
index 93157de470bd..e54f4b24e048 100644
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -24,7 +24,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h
index 5b91e6ff039b..5ae17f70e909 100644
--- a/include/configs/grpeach.h
+++ b/include/configs/grpeach.h
@@ -21,7 +21,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
#endif /* __GRPEACH_H */
diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index ff02a875013c..1d8aa6def88f 100644
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -24,7 +24,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/lager.h b/include/configs/lager.h
index 83e8705dfe76..bb8cc5fecb7a 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -25,7 +25,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/porter.h b/include/configs/porter.h
index 8f834f2c7eba..143e9a4672f1 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -26,7 +26,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/silk.h b/include/configs/silk.h
index 80fce05b3999..2d1e23c27451 100644
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -26,7 +26,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
diff --git a/include/configs/stout.h b/include/configs/stout.h
index d8f0fb185630..9e05a7ae6f96 100644
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -30,7 +30,7 @@
#define CONFIG_SH_ETHER_PHY_ADDR 0x1
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
#define CONFIG_SH_ETHER_CACHE_WRITEBACK
-#define CONFIG_SH_ETHER_CACHE_INVALIDATE
+#define CFG_SH_ETHER_CACHE_INVALIDATE
#define CFG_SH_ETHER_ALIGNE_SIZE 64
/* Board Clock */
--
2.25.1
