[PATCH v2] serial: ns16550: Enable clocks during probe

[Samuel Holland]

If the UART bus clock has a gate, it must be enabled before the UART
can be used.

Signed-off-by: Samuel Holland <sam...@sholland.org>
---

Changes in v2:
 - Only enable the first clock, as using the clk_get_bulk() API pushes
   a board (phycore-rk3288) over its SPL size limit.

 drivers/serial/ns16550.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 7592979cab5..072419343a3 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -507,6 +507,7 @@ int ns16550_serial_probe(struct udevice *dev)
        struct ns16550 *const com_port = dev_get_priv(dev);
        struct reset_ctl_bulk reset_bulk;
        fdt_addr_t addr;
+       struct clk clk;
        int ret;
 
        /*
@@ -524,6 +525,10 @@ int ns16550_serial_probe(struct udevice *dev)
        if (!ret)
                reset_deassert_bulk(&reset_bulk);
 
+       ret = clk_get_by_index(dev, 0, &clk);
+       if (!ret)
+               clk_enable(&clk);
+
        com_port->plat = dev_get_plat(dev);
        ns16550_init(com_port, -1);
 
-- 
2.37.4