Hi Macin,
On 2022/12/30 06:39, Simon Glass wrote:
+Kever Yang
On Thu, 22 Dec 2022 at 18:30, Marcin Woźniak <marcin.wadow...@gmail.com> wrote:
Hello,
I would like to let you know how i've lost about 2 weeks because of lack
of Rockchip BOOTROM documentation.
I tried to use Mainline Uboot to Boot NanoPI R2S using soldered SPI
Winbond 25Q256 chip.
I had to make some patches in Uboot core files to make it work.
I didn't look into SPI boot flow, but there have many boards working
with SPI including rk3399,
rk3328 and other SoCs. It should be work to sync with those boards.
First one adds SPI boot device. File
|arch/arm/mach-rockchip/rk3328/rk3328.c with adding: |
|[BROM_BOOTSOURCE_SPINOR] "/spi@ff190000", |const char * const
boot_devices ||
Second was |arch/arm/mach-rockchip/spl-boot-order.c and last if statement:|
|if (!uclass_get_device_by_of_offset(UCLASS_SPI, node, &parent)) return
BOOT_DEVICE_SPI;|
||
This patch is added because RockChip SPI driver is using UCLASS_SPI
instead of SPI_FLASH so boot device wasn't connecting with right DM
Driver rk_spi.c
Third one fixed SPL and it was added at the end: |drivers/spi/rk_spi.c
|
|DM_DRIVER_ALIAS(rockchip_rk3288_spi, rockchip_rk3328_spi);|
After that board booted successfully. Second bigger problem was a
mistake and lack of RockChip Bootrom documentation.
I've soldered 32Mbyte Flash and didn't know that U-Boot in SPL was
switching it's 3-byte address mode to 4-byte one to gain access to full
32 Mbytes.
The problem was that board booted in cold-start but after issuing
"reset" - it was going to MASKROM mode like no SPI was soldered or empty.
After loosing two weeks i figured that RockChip bootrom talks to SPI
using only 3-byte addressing.
So leaving 4-byte switched by UBoot SPI chip made it unusable to
RockChip Bootrom. I found this by dumping Bootrom and decompiling it.
Sync with engineer working on these area, and get below:
Yes, this "4-byte addressing problem in SPI" issue is in SoCs including
rk3328, this only happen
on SPI NOR size at least 32MB, most of customers only use smaller size
SPI NOR.
If 32MB+ SPI NOR is needed for the project, them we would suggest to
use those SPI flash with
3&4 byte command set support; or else workaround to do the snor_deinit
and exit_4byte_address_mode
will needed before every reboot/hot reset in the system.
Thanks,
- Kever
I don't know if it's enough information to make a patch to MainLine (at
least for SPI boot in RK3328).
Problem with 3-byte addressing is a complete different story.
Sorry for my "unproffesional" mail. I am writing this type of message
for a first time.
Marcin
||
||||||||
||
