Signed-off-by: Sumit Garg <sumit.g...@linaro.org>
---
 arch/arm/dts/qcs404-evb.dts | 98 ++++++++++++++++++++++++++++++++++++-
 1 file changed, 97 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts
index cc70afa4c8..2de0e7537b 100644
--- a/arch/arm/dts/qcs404-evb.dts
+++ b/arch/arm/dts/qcs404-evb.dts
@@ -36,7 +36,7 @@
                ranges = <0x0 0x0 0x0 0xffffffff>;
                compatible = "simple-bus";
 
-               pinctrl_north@1300000 {
+               soc_gpios: pinctrl_north@1300000 {
                        compatible = "qcom,qcs404-pinctrl";
                        reg = <0x1300000 0x200000>;
                        gpio-controller;
@@ -48,6 +48,61 @@
                                pins = "GPIO_17", "GPIO_18";
                                function = "blsp_uart2";
                        };
+
+                       ethernet_defaults: ethernet-defaults {
+                               int {
+                                       pins = "GPIO_61";
+                                       function = "rgmii_int";
+                                       bias-disable;
+                                       drive-strength = <2>;
+                               };
+                               mdc {
+                                       pins = "GPIO_76";
+                                       function = "rgmii_mdc";
+                                       bias-pull-up;
+                               };
+                               mdio {
+                                       pins = "GPIO_75";
+                                       function = "rgmii_mdio";
+                                       bias-pull-up;
+                               };
+                               tx {
+                                       pins = "GPIO_67", "GPIO_66", "GPIO_65", 
"GPIO_64";
+                                       function = "rgmii_tx";
+                                       bias-pull-up;
+                                       drive-strength = <16>;
+                               };
+                               rx {
+                                       pins = "GPIO_73", "GPIO_72", "GPIO_71", 
"GPIO_70";
+                                       function = "rgmii_rx";
+                                       bias-disable;
+                                       drive-strength = <2>;
+                               };
+                               tx-ctl {
+                                       pins = "GPIO_68";
+                                       function = "rgmii_ctl";
+                                       bias-pull-up;
+                                       drive-strength = <16>;
+                               };
+                               rx-ctl {
+                                       pins = "GPIO_74";
+                                       function = "rgmii_ctl";
+                                       bias-disable;
+                                       drive-strength = <2>;
+                               };
+                               tx-ck {
+                                       pins = "GPIO_63";
+                                       function = "rgmii_ck";
+                                       bias-pull-up;
+                                       drive-strength = <16>;
+                               };
+                               rx-ck {
+                                       pins = "GPIO_69";
+                                       function = "rgmii_ck";
+                                       bias-disable;
+                                       drive-strength = <2>;
+                               };
+                       };
                };
 
                gcc: clock-controller@1800000 {
@@ -172,6 +227,47 @@
                        };
                };
 
+               ethernet: ethernet@7a80000 {
+                       compatible = "qcom,qcs404-ethqos";
+                       reg = <0x07a80000 0x10000>,
+                               <0x07a96000 0x100>;
+                       reg-names = "stmmaceth", "rgmii";
+                       clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
+                       clocks = <&gcc GCC_ETH_AXI_CLK>,
+                                <&gcc GCC_ETH_SLAVE_AHB_CLK>,
+                                <&gcc GCC_ETH_PTP_CLK>,
+                                <&gcc GCC_ETH_RGMII_CLK>;
+
+                       resets = <&reset GCC_EMAC_BCR>;
+                       reset-names = "emac";
+
+                       snps,tso;
+                       rx-fifo-depth = <4096>;
+                       tx-fifo-depth = <4096>;
+
+                       snps,reset-gpio = <&soc_gpios 60 GPIO_ACTIVE_LOW>;
+                       snps,reset-active-low;
+                       snps,reset-delays-us = <0 10000 10000>;
+
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&ethernet_defaults>;
+
+                       phy-handle = <&phy1>;
+                       phy-mode = "rgmii";
+                       max-speed = <1000>;
+
+                       mdio {
+                               #address-cells = <0x1>;
+                               #size-cells = <0x0>;
+                               compatible = "snps,dwmac-mdio";
+                               phy1: phy@3 {
+                                       compatible = 
"ethernet-phy-ieee802.3-c22";
+                                       device_type = "ethernet-phy";
+                                       reg = <0x3>;
+                               };
+                       };
+               };
+
                spmi@200f000 {
                        compatible = "qcom,spmi-pmic-arb";
                        reg = <0x200f000 0x1000
-- 
2.34.1

Reply via email to