Hi Peter,

> From: Peter Yu-Chien Lin(林宇謙) <peter...@andestech.com>
> Sent: Thursday, January 19, 2023 3:06 PM
> To: u-boot@lists.denx.de
> Cc: Leo Yu-Chi Liang(梁育齊) <ycli...@andestech.com>; Rick Jian-Zhi Chen(陳建志) 
> <r...@andestech.com>; Peter Yu-Chien Lin(林宇謙) <peter...@andestech.com>
> Subject: [PATCH 08/11] configs: ae350: Enable v5l2 cache for AE350 platforms
>
> Enable cache-v5l2 driver for each AE350 defconfig.


Please refer to commit ca06444aac2c643db3a3f2eb37afc60fae15177e
and describe why it shall be enabled currently. And it can be enabled
by imply in Kconfig.

Thanks,
Rick

>
> Signed-off-by: Yu Chien Peter Lin <peter...@andestech.com>
> ---
>  configs/ae350_rv32_defconfig         | 1 +
>  configs/ae350_rv32_spl_defconfig     | 3 +++
>  configs/ae350_rv32_spl_xip_defconfig | 3 +++
>  configs/ae350_rv32_xip_defconfig     | 1 +
>  configs/ae350_rv64_defconfig         | 1 +
>  configs/ae350_rv64_spl_defconfig     | 3 +++
>  configs/ae350_rv64_spl_xip_defconfig | 3 +++
>  configs/ae350_rv64_xip_defconfig     | 1 +
>  8 files changed, 16 insertions(+)
>
> diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig 
> index e5c8358e54..5bcc7b9526 100644
> --- a/configs/ae350_rv32_defconfig
> +++ b/configs/ae350_rv32_defconfig
> @@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y  
> CONFIG_SYS_RELOC_GD_ENV_ADDR=y  CONFIG_BOOTP_SEND_HOSTNAME=y  
> CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_V5L2_CACHE=y
>  CONFIG_MMC=y
>  CONFIG_FTSDC010=y
>  CONFIG_FTSDC010_SDIO=y
> diff --git a/configs/ae350_rv32_spl_defconfig 
> b/configs/ae350_rv32_spl_defconfig
> index a66db65621..688c2c15cd 100644
> --- a/configs/ae350_rv32_spl_defconfig
> +++ b/configs/ae350_rv32_spl_defconfig
> @@ -22,6 +22,8 @@ CONFIG_BOOTDELAY=3
>  CONFIG_BOARD_EARLY_INIT_F=y
>  CONFIG_SPL_MAX_SIZE=0x100000
>  CONFIG_SPL_BSS_START_ADDR=0x4000000
> +CONFIG_SPL_BOARD_INIT=y
> +CONFIG_SPL_CACHE=y
>  CONFIG_SYS_PBSIZE=1050
>  CONFIG_SYS_BOOTM_LEN=0x4000000
>  CONFIG_CMD_IMLS=y
> @@ -34,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y  CONFIG_ENV_IS_IN_SPI_FLASH=y  
> CONFIG_BOOTP_SEND_HOSTNAME=y  CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_V5L2_CACHE=y
>  CONFIG_MMC=y
>  CONFIG_FTSDC010=y
>  CONFIG_FTSDC010_SDIO=y
> diff --git a/configs/ae350_rv32_spl_xip_defconfig 
> b/configs/ae350_rv32_spl_xip_defconfig
> index 606962c0a7..07bef47e42 100644
> --- a/configs/ae350_rv32_spl_xip_defconfig
> +++ b/configs/ae350_rv32_spl_xip_defconfig
> @@ -23,6 +23,8 @@ CONFIG_BOOTDELAY=3
>  CONFIG_BOARD_EARLY_INIT_F=y
>  CONFIG_SPL_MAX_SIZE=0x100000
>  CONFIG_SPL_BSS_START_ADDR=0x4000000
> +CONFIG_SPL_BOARD_INIT=y
> +CONFIG_SPL_CACHE=y
>  CONFIG_SYS_PBSIZE=1050
>  CONFIG_SYS_BOOTM_LEN=0x4000000
>  CONFIG_CMD_IMLS=y
> @@ -35,6 +37,7 @@ CONFIG_ENV_OVERWRITE=y  CONFIG_ENV_IS_IN_SPI_FLASH=y  
> CONFIG_BOOTP_SEND_HOSTNAME=y  CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_V5L2_CACHE=y
>  CONFIG_MMC=y
>  CONFIG_FTSDC010=y
>  CONFIG_FTSDC010_SDIO=y
> diff --git a/configs/ae350_rv32_xip_defconfig 
> b/configs/ae350_rv32_xip_defconfig
> index 069a9d3982..235a496c58 100644
> --- a/configs/ae350_rv32_xip_defconfig
> +++ b/configs/ae350_rv32_xip_defconfig
> @@ -29,6 +29,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y  
> CONFIG_SYS_RELOC_GD_ENV_ADDR=y  CONFIG_BOOTP_SEND_HOSTNAME=y  
> CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_V5L2_CACHE=y
>  CONFIG_MMC=y
>  CONFIG_FTSDC010=y
>  CONFIG_FTSDC010_SDIO=y
> diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig 
> index c373b99b95..af23f27ade 100644
> --- a/configs/ae350_rv64_defconfig
> +++ b/configs/ae350_rv64_defconfig
> @@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y  
> CONFIG_SYS_RELOC_GD_ENV_ADDR=y  CONFIG_BOOTP_SEND_HOSTNAME=y  
> CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_V5L2_CACHE=y
>  CONFIG_MMC=y
>  CONFIG_FTSDC010=y
>  CONFIG_FTSDC010_SDIO=y
> diff --git a/configs/ae350_rv64_spl_defconfig 
> b/configs/ae350_rv64_spl_defconfig
> index f235db7990..295b56835f 100644
> --- a/configs/ae350_rv64_spl_defconfig
> +++ b/configs/ae350_rv64_spl_defconfig
> @@ -22,6 +22,8 @@ CONFIG_BOOTDELAY=3
>  CONFIG_BOARD_EARLY_INIT_F=y
>  CONFIG_SPL_MAX_SIZE=0x100000
>  CONFIG_SPL_BSS_START_ADDR=0x4000000
> +CONFIG_SPL_BOARD_INIT=y
> +CONFIG_SPL_CACHE=y
>  CONFIG_SYS_PBSIZE=1050
>  CONFIG_SYS_BOOTM_LEN=0x4000000
>  CONFIG_CMD_IMLS=y
> @@ -34,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y  CONFIG_ENV_IS_IN_SPI_FLASH=y  
> CONFIG_BOOTP_SEND_HOSTNAME=y  CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_V5L2_CACHE=y
>  CONFIG_MMC=y
>  CONFIG_FTSDC010=y
>  CONFIG_FTSDC010_SDIO=y
> diff --git a/configs/ae350_rv64_spl_xip_defconfig 
> b/configs/ae350_rv64_spl_xip_defconfig
> index 4cbfd52fb1..497e6c0155 100644
> --- a/configs/ae350_rv64_spl_xip_defconfig
> +++ b/configs/ae350_rv64_spl_xip_defconfig
> @@ -23,6 +23,8 @@ CONFIG_BOOTDELAY=3
>  CONFIG_BOARD_EARLY_INIT_F=y
>  CONFIG_SPL_MAX_SIZE=0x100000
>  CONFIG_SPL_BSS_START_ADDR=0x4000000
> +CONFIG_SPL_BOARD_INIT=y
> +CONFIG_SPL_CACHE=y
>  CONFIG_SYS_PBSIZE=1050
>  CONFIG_SYS_BOOTM_LEN=0x4000000
>  CONFIG_CMD_IMLS=y
> @@ -35,6 +37,7 @@ CONFIG_ENV_OVERWRITE=y  CONFIG_ENV_IS_IN_SPI_FLASH=y  
> CONFIG_BOOTP_SEND_HOSTNAME=y  CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_V5L2_CACHE=y
>  CONFIG_MMC=y
>  CONFIG_FTSDC010=y
>  CONFIG_FTSDC010_SDIO=y
> diff --git a/configs/ae350_rv64_xip_defconfig 
> b/configs/ae350_rv64_xip_defconfig
> index 4fed2ead1d..5bc45932a8 100644
> --- a/configs/ae350_rv64_xip_defconfig
> +++ b/configs/ae350_rv64_xip_defconfig
> @@ -29,6 +29,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y  
> CONFIG_SYS_RELOC_GD_ENV_ADDR=y  CONFIG_BOOTP_SEND_HOSTNAME=y  
> CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_V5L2_CACHE=y
>  CONFIG_MMC=y
>  CONFIG_FTSDC010=y
>  CONFIG_FTSDC010_SDIO=y
> --
> 2.34.1
>
> CONFIDENTIALITY NOTICE:
>
> This e-mail (and its attachments) may contain confidential and legally 
> privileged information or information protected from disclosure. If you are 
> not the intended recipient, you are hereby notified that any disclosure, 
> copying, distribution, or use of the information contained herein is strictly 
> prohibited. In this case, please immediately notify the sender by return 
> e-mail, delete the message (and any accompanying documents) and destroy all 
> printed hard copies. Thank you for your cooperation.
>
> Copyright ANDES TECHNOLOGY CORPORATION - All Rights Reserved.

Reply via email to