Update the uboot dtsi to enable DMA and CPSW at the uboot level

Signed-off-by: Bryan Brattlof <b...@ti.com>
---
 arch/arm/dts/k3-am62a7-r5-sk.dts      |  8 ++++++++
 arch/arm/dts/k3-am62a7-sk-u-boot.dtsi | 26 +++++++++++++++++++++++++-
 2 files changed, 33 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/k3-am62a7-r5-sk.dts b/arch/arm/dts/k3-am62a7-r5-sk.dts
index c953a82c7a5e9..b4c2fd7f50038 100644
--- a/arch/arm/dts/k3-am62a7-r5-sk.dts
+++ b/arch/arm/dts/k3-am62a7-r5-sk.dts
@@ -143,3 +143,11 @@
        status = "okay";
        bootph-pre-ram;
 };
+
+&main_pktdma {
+       ti,sci = <&dm_tifs>;
+};
+
+&main_bcdma {
+       ti,sci = <&dm_tifs>;
+};
diff --git a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi 
b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
index cf938c43b832e..fd3f7e63d5da6 100644
--- a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
@@ -15,7 +15,7 @@
        };
 };
 
-&cbass_main{
+&cbass_main {
        bootph-pre-ram;
 
        timer1: timer@2400000 {
@@ -138,3 +138,27 @@
 &vdd_mmc1 {
        bootph-pre-ram;
 };
+
+&main_bcdma {
+       bootph-pre-ram;
+};
+
+&main_pktdma {
+       bootph-pre-ram;
+};
+
+&cpsw3g {
+       reg = <0x00 0x08000000 0x00 0x200000>,
+             <0x00 0x43000200 0x00 0x8>;
+       reg-names = "cpsw_nuss", "mac_efuse";
+       /delete-property/ ranges;
+       pinctrl-0 = <&main_mdio1_pins_default
+                    &main_rgmii1_pins_default>;
+       bootph-pre-ram;
+
+       cpsw-phy-sel@04044 {
+               compatible = "ti,am64-phy-gmii-sel";
+               reg = <0x00 0x00104044 0x00 0x8>;
+               bootph-pre-ram;
+       };
+};
-- 
2.40.0

Reply via email to