From: Sin Hui Kho <sin.hui....@intel.com>

Add AGILEX7 supported DDR handoff data

Signed-off-by: Sin Hui Kho <sin.hui....@intel.com>
---
 arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 11 ++++++++++-
 arch/arm/mach-socfpga/wrap_handoff_soc64.c         |  4 ++++
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-socfpga/include/mach/handoff_soc64.h 
b/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
index b0134dd9bd..bfda3c42bb 100644
--- a/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
+++ b/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0
  *
- * Copyright (C) 2016-2021 Intel Corporation <www.intel.com>
+ * Copyright (C) 2016-2023 Intel Corporation <www.intel.com>
  *
  */
 
@@ -27,7 +27,16 @@
        IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX) || \
        IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7)
 #define SOC64_HANDOFF_BASE             0xFFE3F000
+#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7)
+#define SOC64_HANDOFF_MISC             (SOC64_HANDOFF_BASE + 0x628)
+/* DDR handoff */
+#define SOC64_HANDOFF_MAGIC_DDR        0x5344524D
+#define SOC64_HANDOFF_DDR_BASE (SOC64_HANDOFF_BASE + 0x610)
+#define SOC64_HANDOFF_DDR_LEN  2
+#define SOC64_HANDOFF_DDR_INTERLEAVING_MODE_MASK       BIT(0)
+#else
 #define SOC64_HANDOFF_MISC             (SOC64_HANDOFF_BASE + 0x610)
+#endif
 #elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X)
 #define SOC64_HANDOFF_BASE             0xFFE5F000
 #define SOC64_HANDOFF_MISC             (SOC64_HANDOFF_BASE + 0x630)
diff --git a/arch/arm/mach-socfpga/wrap_handoff_soc64.c 
b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
index e7cb5ea89c..1abbe5a0d0 100644
--- a/arch/arm/mach-socfpga/wrap_handoff_soc64.c
+++ b/arch/arm/mach-socfpga/wrap_handoff_soc64.c
@@ -31,6 +31,10 @@ static enum endianness check_endianness(u32 handoff)
        case SOC64_HANDOFF_DDR_PHY_INIT_ENGINE_MAGIC:
                debug("%s: PHY engine handoff data\n", __func__);
                return LITTLE_ENDIAN;
+#elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7)
+       case SOC64_HANDOFF_MAGIC_DDR:
+               debug("%s: SOC64_HANDOFF_MAGIC_DDR\n", __func__);
+               return BIG_ENDIAN;
 #endif
        default:
                debug("%s: Unknown endianness!!\n", __func__);
-- 
2.25.1

Reply via email to