Hi Neha
On 4/26/2023 2:56 PM, Neha Malcom Francis wrote:
Hi Udit
On 20/04/23 13:41, Udit Kumar wrote:
This patch deletes tifs DT node as part of fixup.
TISCI API reported msmc_size, does not include
64KB reserved size for tifs aka MSMC comms memory.
As part of fixup, original code uses TISCI API
reported msmc_size as size for sram DT node.
tifs node is similar to l3-cache, which should
hold address above msms_size, and should be deleted
before passing control to OS.
Documentation
https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/general/core.html?highlight=msmc#tisci-msg-query-msmc
Signed-off-by: Udit Kumar <u-kum...@ti.com>
---
Changes since v1:
https://lore.kernel.org/all/20230419061352.3156023-1-u-kum...@ti.com/
- moved tifs check above l3 as
arch/arm/mach-k3/common.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index a2adb791f6..33b1f10d58 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -351,6 +351,7 @@ int fdt_fixup_msmc_ram(void *blob, char
*parent_path, char *node_name)
subnode, addr, size);
if (addr + size > msmc_size ||
!strncmp(fdt_get_name(blob, subnode, &len), "sysfw", 5) ||
+ !strncmp(fdt_get_name(blob, subnode, &len), "tifs", 4) ||
!strncmp(fdt_get_name(blob, subnode, &len), "l3cache",
7)) {
fdt_del_node(blob, subnode);
debug("%s: deleting subnode %d\n", __func__, subnode);
Reviewed-by: Neha Malcom Francis <n-fran...@ti.com>
I do have a general doubt; why do we have only atf-sram sub-node in
msmc_sram in all other devices (j721e, j7200 and am65) except j721s2?
let me know, which source code you are referring to
I could see for j721s2 as well, in uboot[0] and Linux[1]
[0]
https://elixir.bootlin.com/linux/latest/source/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi#L16
[1]
https://elixir.bootlin.com/linux/latest/source/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi#L16
