On 09:43-20230503, Udit Kumar wrote: > From: Vaishnav Achath <vaishna...@ti.com> > > Upstream Linux commit id 8f6c475f4ca7a > > J7200 has 8 MCSPI instances in the main domain and 3 instances > in the MCU domain. Add the DT nodes for all the 11 instances and > keep them disabled. MAIN_MCSPI4 is connected as a slave to MCU_MCSPI2 > by default at power-up, MAIN_MCSPI4 and MCU_MCSPI2 are not pinned out > externally. > > Signed-off-by: Vaishnav Achath <vaishna...@ti.com> > Reviewed-by: Keerthy <j-keer...@ti.com> > Link: https://lore.kernel.org/r/20230321082827.14274-3-vaishna...@ti.com > Signed-off-by: Nishanth Menon <n...@ti.com>
NAK. I have'nt signed-off on u-boot patches. As my first message went - you will get this for free and save a bunch of the patch repeat by waiting a few days.. (we are 3-4 days away from 6.4-rc1).. > --- > arch/arm/dts/k3-j7200-main.dtsi | 88 +++++++++++++++++++++++++++ > arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 33 ++++++++++ > 2 files changed, 121 insertions(+) > > diff --git a/arch/arm/dts/k3-j7200-main.dtsi b/arch/arm/dts/k3-j7200-main.dtsi > index 3dfbeca4ef..be8034bf5b 100644 > --- a/arch/arm/dts/k3-j7200-main.dtsi > +++ b/arch/arm/dts/k3-j7200-main.dtsi > @@ -798,6 +798,94 @@ > clock-names = "gpio"; > }; > > + main_spi0: spi@2100000 { > + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; > + reg = <0x00 0x02100000 0x00 0x400>; > + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + power-domains = <&k3_pds 266 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 266 1>; > + status = "disabled"; > + }; > + > + main_spi1: spi@2110000 { > + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; > + reg = <0x00 0x02110000 0x00 0x400>; > + interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + power-domains = <&k3_pds 267 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 267 1>; > + status = "disabled"; > + }; > + > + main_spi2: spi@2120000 { > + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; > + reg = <0x00 0x02120000 0x00 0x400>; > + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + power-domains = <&k3_pds 268 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 268 1>; > + status = "disabled"; > + }; > + > + main_spi3: spi@2130000 { > + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; > + reg = <0x00 0x02130000 0x00 0x400>; > + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 269 1>; > + status = "disabled"; > + }; > + > + main_spi4: spi@2140000 { > + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; > + reg = <0x00 0x02140000 0x00 0x400>; > + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + power-domains = <&k3_pds 270 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 270 1>; > + status = "disabled"; > + }; > + > + main_spi5: spi@2150000 { > + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; > + reg = <0x00 0x02150000 0x00 0x400>; > + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + power-domains = <&k3_pds 271 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 271 1>; > + status = "disabled"; > + }; > + > + main_spi6: spi@2160000 { > + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; > + reg = <0x00 0x02160000 0x00 0x400>; > + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + power-domains = <&k3_pds 272 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 272 1>; > + status = "disabled"; > + }; > + > + main_spi7: spi@2170000 { > + compatible = "ti,am654-mcspi","ti,omap4-mcspi"; > + reg = <0x00 0x02170000 0x00 0x400>; > + interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + power-domains = <&k3_pds 273 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 273 1>; > + status = "disabled"; > + }; > + > watchdog0: watchdog@2200000 { > compatible = "ti,j7-rti-wdt"; > reg = <0x0 0x2200000 0x0 0x100>; > diff --git a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi > b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi > index e302c3d6ac..3328f4bc6f 100644 > --- a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi > +++ b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi > @@ -453,6 +453,39 @@ > status = "disabled"; > }; > > + mcu_spi0: spi@40300000 { > + compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; > + reg = <0x00 0x040300000 0x00 0x400>; > + interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 274 0>; > + status = "disabled"; > + }; > + > + mcu_spi1: spi@40310000 { > + compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; > + reg = <0x00 0x040310000 0x00 0x400>; > + interrupts = <GIC_SPI 849 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 275 0>; > + status = "disabled"; > + }; > + > + mcu_spi2: spi@40320000 { > + compatible = "ti,am654-mcspi", "ti,omap4-mcspi"; > + reg = <0x00 0x040320000 0x00 0x400>; > + interrupts = <GIC_SPI 850 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 276 0>; > + status = "disabled"; > + }; > + > fss: syscon@47000000 { > bootph-pre-ram; > compatible = "syscon", "simple-mfd"; > -- > 2.34.1 > -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D