Hi Jonas, On Mon, May 29, 2023 at 11:45 PM Jonas Karlman <jo...@kwiboo.se> wrote: > > Hi, > > On 2023-05-29 06:59, Tianling Shen wrote: > > FriendlyElec Nanopi R5S is an open-sourced mini IoT gateway device. > > > > Board Specifications > > - Rockchip RK3568 > > - 2 or 4GB LPDDR4X > > - 8GB or 16GB eMMC, SD card slot > > - GbE LAN (Native) > > - 2x 2.5G LAN (PCIe) > > - M.2 Connector > > - HDMI 2.0, MIPI DSI/CSI > > - 2xUSB 3.0 Host > > - USB Type C PD, 5V/9V/12V > > - GPIO: 12-pin 0.5mm FPC connector > > > > The device tree is taken from kernel v6.4-rc1. > > > > Signed-off-by: Tianling Shen <cns...@gmail.com> > > --- > > > > No changes in v2. > > > > --- > > arch/arm/dts/Makefile | 1 + > > arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi | 33 ++ > > arch/arm/dts/rk3568-nanopi-r5s.dts | 136 +++++ > > arch/arm/dts/rk3568-nanopi-r5s.dtsi | 590 +++++++++++++++++++++ > > board/rockchip/evb_rk3568/MAINTAINERS | 8 + > > configs/nanopi-r5s-rk3568_defconfig | 90 ++++ > > 6 files changed, 858 insertions(+) > > create mode 100644 arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi > > create mode 100644 arch/arm/dts/rk3568-nanopi-r5s.dts > > create mode 100644 arch/arm/dts/rk3568-nanopi-r5s.dtsi > > create mode 100644 configs/nanopi-r5s-rk3568_defconfig > > > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > > index 480269fa60..e2eda3ffcb 100644 > > --- a/arch/arm/dts/Makefile > > +++ b/arch/arm/dts/Makefile > > @@ -169,6 +169,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \ > > rk3566-anbernic-rgxx3.dtb \ > > rk3566-radxa-cm3-io.dtb \ > > rk3568-evb.dtb \ > > + rk3568-nanopi-r5s.dtb \ > > rk3568-rock-3a.dtb > > > > dtb-$(CONFIG_ROCKCHIP_RK3588) += \ > > diff --git a/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi > > b/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi > > new file mode 100644 > > index 0000000000..b37ad1e72d > > --- /dev/null > > +++ b/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi > > @@ -0,0 +1,33 @@ > > +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > > +/* > > + * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd. > > + * (http://www.friendlyelec.com) > > + * > > + * Copyright (c) 2023 Tianling Shen <cns...@gmail.com> > > + */ > > + > > +#include "rk356x-u-boot.dtsi" > > + > > +/ { > > + chosen { > > + stdout-path = &uart2; > > + u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci; > > + }; > > +}; > > + > > +&sdhci { > > + cap-mmc-highspeed; > > + mmc-hs200-1_8v; > > +}; > > Because this is a rk3568 you can probably also add: > > mmc-ddr-1_8v; > mmc-hs400-1_8v; > mmc-hs400-enhanced-strobe; > > and a pinctrl with emmc_datastrobe according to schematic: > > pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; > > > + > > +&sdmmc0 { > > + bus-width = <4>; > > + bootph-pre-ram; > > + u-boot,spl-fifo-mode; > > +}; > > The sdmmc0 node is not needed: > - bus-width is set in linux dts > - bootph-pre-ram is set in rk356x-u-boot.dtsi > - u-boot,spl-fifo-mode is not needed on rk356x > > > + > > +&uart2 { > > + clock-frequency = <24000000>; > > + bootph-pre-ram; > > Recommended to be bootph-all, in case TPL support gets added in future. >
Thank you so much for all of these explanations and suggestions! I will test them later today and send v3. Thanks, Tianling. > > + status = "okay"; > > +}; > > [snip] > > > diff --git a/board/rockchip/evb_rk3568/MAINTAINERS > > b/board/rockchip/evb_rk3568/MAINTAINERS > > index 6b2e7c7575..9222682461 100644 > > --- a/board/rockchip/evb_rk3568/MAINTAINERS > > +++ b/board/rockchip/evb_rk3568/MAINTAINERS > > @@ -7,6 +7,14 @@ F: configs/evb-rk3568_defconfig > > F: arch/arm/dts/rk3568-evb-boot.dtsi > > F: arch/arm/dts/rk3568-evb.dts > > > > +NANOPI-R5S > > +M: Tianling Shen <cns...@gmail.com> > > +S: Maintained > > +F: configs/nanopi-r5s-rk3568_defconfig > > +F: arch/arm/dts/rk3568-nanopi-r5s.dts > > +F: arch/arm/dts/rk3568-nanopi-r5s.dtsi > > +F: arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi > > + > > RADXA-CM3 > > M: Jagan Teki <ja...@amarulasolutions.com> > > S: Maintained > > diff --git a/configs/nanopi-r5s-rk3568_defconfig > > b/configs/nanopi-r5s-rk3568_defconfig > > new file mode 100644 > > index 0000000000..041fa6d84f > > --- /dev/null > > +++ b/configs/nanopi-r5s-rk3568_defconfig > > @@ -0,0 +1,90 @@ > > +CONFIG_ARM=y > > +CONFIG_SKIP_LOWLEVEL_INIT=y > > +CONFIG_COUNTER_FREQUENCY=24000000 > > +CONFIG_ARCH_ROCKCHIP=y > > +CONFIG_TEXT_BASE=0x00a00000 > > +CONFIG_SPL_LIBCOMMON_SUPPORT=y > > +CONFIG_SPL_LIBGENERIC_SUPPORT=y > > +CONFIG_NR_DRAM_BANKS=2 > > +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y > > +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 > > +CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5s" > > +CONFIG_ROCKCHIP_RK3568=y > > +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y > > +CONFIG_SPL_SERIAL=y > > +CONFIG_SPL_STACK_R_ADDR=0x600000 > > +CONFIG_TARGET_EVB_RK3568=y > > +CONFIG_SPL_STACK=0x400000 > > +CONFIG_DEBUG_UART_BASE=0xFE660000 > > +CONFIG_DEBUG_UART_CLOCK=24000000 > > +CONFIG_SYS_LOAD_ADDR=0xc00800 > > +CONFIG_DEBUG_UART=y > > +CONFIG_FIT=y > > +CONFIG_FIT_VERBOSE=y > > +CONFIG_SPL_LOAD_FIT=y > > +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-nanopi-r5s.dtb" > > +# CONFIG_DISPLAY_CPUINFO is not set > > +CONFIG_DISPLAY_BOARDINFO_LATE=y > > +CONFIG_SPL_MAX_SIZE=0x40000 > > +CONFIG_SPL_PAD_TO=0x7f8000 > > +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y > > +CONFIG_SPL_BSS_START_ADDR=0x4000000 > > +CONFIG_SPL_BSS_MAX_SIZE=0x4000 > > +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set > > +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set > > +CONFIG_SPL_STACK_R=y > > +CONFIG_SPL_ATF=y > > +CONFIG_CMD_GPIO=y > > +CONFIG_CMD_GPT=y > > +CONFIG_CMD_I2C=y > > +CONFIG_CMD_MMC=y > > +CONFIG_CMD_USB=y > > +CONFIG_CMD_USB_MASS_STORAGE=y > > +CONFIG_CMD_PMIC=y > > +CONFIG_CMD_REGULATOR=y > > +# CONFIG_SPL_DOS_PARTITION is not set > > +CONFIG_SPL_OF_CONTROL=y > > +CONFIG_OF_LIVE=y > > +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names > > interrupt-parent assigned-clocks assigned-clock-rates > > assigned-clock-parents" > > +CONFIG_SPL_DM_WARN=y > > +CONFIG_SPL_REGMAP=y > > +CONFIG_SPL_SYSCON=y > > +CONFIG_SPL_CLK=y > > +CONFIG_ROCKCHIP_GPIO=y > > +CONFIG_SYS_I2C_ROCKCHIP=y > > +CONFIG_MISC=y > > +CONFIG_SUPPORT_EMMC_RPMB=y > > +CONFIG_MMC_DW=y > > +CONFIG_MMC_DW_ROCKCHIP=y > > +CONFIG_MMC_SDHCI=y > > +CONFIG_MMC_SDHCI_SDMA=y > > +CONFIG_MMC_SDHCI_ROCKCHIP=y > > +CONFIG_DM_ETH=y > > +CONFIG_ETH_DESIGNWARE=y > > +CONFIG_GMAC_ROCKCHIP=y > > +CONFIG_POWER_DOMAIN=y > > +CONFIG_PHY_ROCKCHIP_INNO_USB2=y > > +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y > > +CONFIG_DM_PMIC=y > > +CONFIG_PMIC_RK8XX=y > > +CONFIG_REGULATOR_PWM=y > > +CONFIG_DM_REGULATOR_FIXED=y > > +CONFIG_SPL_DM_REGULATOR_FIXED=y > > +CONFIG_DM_REGULATOR_GPIO=y > > REGULATOR_PWM and DM_REGULATOR_GPIO is not referenced in device tree. > DM_REGULATOR_FIXED is selected in arch Kconfig > > I would recommend running moveconfig.py to clean up/re-order this file. > > Regards, > Jonas > > > +CONFIG_REGULATOR_RK8XX=y > > +CONFIG_PWM_ROCKCHIP=y > > +CONFIG_SPL_RAM=y > > +CONFIG_BAUDRATE=1500000 > > +CONFIG_DEBUG_UART_SHIFT=2 > > +CONFIG_SYS_NS16550_MEM32=y > > +CONFIG_SYSRESET=y > > +CONFIG_SYSRESET_PSCI=y > > +CONFIG_USB=y > > +CONFIG_USB_XHCI_HCD=y > > +CONFIG_USB_XHCI_DWC3=y > > +CONFIG_USB_EHCI_HCD=y > > +CONFIG_USB_EHCI_GENERIC=y > > +CONFIG_USB_OHCI_HCD=y > > +CONFIG_USB_OHCI_GENERIC=y > > +CONFIG_USB_DWC3=y > > +CONFIG_ERRNO_STR=y >