From: Haiying Wang <haiying.w...@freescale.com> In the case the QE's microcode is stored in nand flash, we need to load it from NAND flash to ddr first then the qe_init can get the ucode correctly.
Signed-off-by: Haiying Wang <haiying.w...@freescale.com> --- arch/powerpc/cpu/mpc85xx/cpu_init.c | 17 +++++++++++++++++ 1 files changed, 17 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 215b7b3..5642cd7 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -37,6 +37,10 @@ #include <asm/fsl_law.h> #include <asm/fsl_serdes.h> #include "mp.h" +#ifdef CONFIG_SYS_QE_FW_IN_NAND +#include <nand.h> +#include <errno.h> +#endif DECLARE_GLOBAL_DATA_PTR; @@ -448,6 +452,19 @@ void cpu_secondary_init_r(void) { #ifdef CONFIG_QE uint qe_base = CONFIG_SYS_IMMR + 0x00080000; /* QE immr base */ +#ifdef CONFIG_SYS_QE_FW_IN_NAND + int ret; + size_t fw_length = CONFIG_SYS_QE_FW_LENGTH; + + /* load QE firmware from NAND flash to DDR first */ + ret = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FW_IN_NAND, + &fw_length, (u_char *)CONFIG_SYS_QE_FW_ADDR); + + if (ret && ret == -EUCLEAN) { + printf ("NAND read for QE firmware at offset %x failed %d\n", + CONFIG_SYS_QE_FW_IN_NAND, ret); + } +#endif qe_init(qe_base); qe_reset(); #endif -- 1.7.3.1.50.g1e633 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot