In spl_dcache_enable after setting up page table, set gd->relocaddr pointer to tlb_addr, to get next location to reserve memory. Align tlb_addr with 64KB address.
Signed-off-by: Nikhil M Jain <n-ja...@ti.com> Reviewed-by: Devarsh Thakkar <devar...@ti.com> --- V5: - No change. V4: - Add Reviewed-by tag. V3: - No change. V2: - Perform 64KB alignment on tlb_addr. arch/arm/mach-k3/common.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index bda01527d3..f9cfa66059 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -629,8 +629,10 @@ void spl_enable_dcache(void) ram_top = (phys_addr_t) 0x100000000; gd->arch.tlb_addr = ram_top - gd->arch.tlb_size; + gd->arch.tlb_addr &= ~(0x10000 - 1); debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, gd->arch.tlb_addr + gd->arch.tlb_size); + gd->relocaddr = gd->arch.tlb_addr; dcache_enable(); #endif -- 2.34.1