From: Christian Taedcke <christian.taed...@weidmueller.com> This moves the aes operation that is perfomed by the pmu into a separate file. This way it can be called not just from the shell command, but also e.g. from board initialization code.
Signed-off-by: Christian Taedcke <christian.taed...@weidmueller.com> --- arch/arm/mach-zynqmp/Makefile | 3 +- arch/arm/mach-zynqmp/aes.c | 58 +++++++++++++++++++ .../arm/mach-zynqmp/include/mach/zynqmp_aes.h | 31 ++++++++++ board/xilinx/zynqmp/cmds.c | 44 ++------------ 4 files changed, 96 insertions(+), 40 deletions(-) create mode 100644 arch/arm/mach-zynqmp/aes.c create mode 100644 arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h diff --git a/arch/arm/mach-zynqmp/Makefile b/arch/arm/mach-zynqmp/Makefile index bb1830c846..1a76493bef 100644 --- a/arch/arm/mach-zynqmp/Makefile +++ b/arch/arm/mach-zynqmp/Makefile @@ -3,8 +3,7 @@ # (C) Copyright 2014 - 2015 Xilinx, Inc. # Michal Simek <michal.si...@xilinx.com> -obj-y += clk.o -obj-y += cpu.o +obj-y += aes.o clk.o cpu.o obj-$(CONFIG_MP) += mp.o obj-$(CONFIG_SPL_BUILD) += spl.o handoff.o psu_spl_init.o obj-$(CONFIG_SPL_ZYNQMP_DRAM_ECC_INIT) += ecc_spl_init.o diff --git a/arch/arm/mach-zynqmp/aes.c b/arch/arm/mach-zynqmp/aes.c new file mode 100644 index 0000000000..f508862e57 --- /dev/null +++ b/arch/arm/mach-zynqmp/aes.c @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * (C) Copyright 2018 Xilinx, Inc. + * Siva Durga Prasad Paladugu <siva.durga.palad...@xilinx.com> + * + * Copyright (C) 2023 Weidmueller Interface GmbH & Co. KG <o...@weidmueller.com> + * Christian Taedcke <christian.taed...@weidmueller.com> + */ + +#include <common.h> +#include <mach/zynqmp_aes.h> + +#include <asm/arch/sys_proto.h> +#include <cpu_func.h> +#include <memalign.h> +#include <zynqmp_firmware.h> + +int zynqmp_aes_operation(struct zynqmp_aes *aes) +{ + int ret; + u32 ret_payload[PAYLOAD_ARG_CNT]; + + if (zynqmp_firmware_version() <= PMUFW_V1_0) + return -ENOENT; + + if (aes->srcaddr && aes->ivaddr && aes->dstaddr) { + flush_dcache_range(aes->srcaddr, + (aes->srcaddr + + roundup(aes->len, ARCH_DMA_MINALIGN))); + flush_dcache_range(aes->ivaddr, + (aes->ivaddr + + roundup(IV_SIZE, ARCH_DMA_MINALIGN))); + flush_dcache_range(aes->dstaddr, + (aes->dstaddr + + roundup(aes->len, ARCH_DMA_MINALIGN))); + } + + if (aes->keysrc == 0) { + if (aes->keyaddr == 0) + return -EINVAL; + + flush_dcache_range(aes->keyaddr, (aes->keyaddr + + roundup(KEY_PTR_LEN, ARCH_DMA_MINALIGN))); + } + + flush_dcache_range((ulong)aes, (ulong)(aes) + + roundup(sizeof(struct zynqmp_aes), ARCH_DMA_MINALIGN)); + + ret = xilinx_pm_request(PM_SECURE_AES, upper_32_bits((ulong)aes), + lower_32_bits((ulong)aes), 0, 0, ret_payload); + if (ret || ret_payload[1]) { + printf("Failed: AES op status:0x%x, errcode:0x%x\n", + ret, ret_payload[1]); + return -EIO; + } + + return 0; +} diff --git a/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h b/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h new file mode 100644 index 0000000000..7c28e377a1 --- /dev/null +++ b/arch/arm/mach-zynqmp/include/mach/zynqmp_aes.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2023 Weidmueller Interface GmbH & Co. KG <o...@weidmueller.com> + * Christian Taedcke <christian.taed...@weidmueller.com> + * + * Declaration of AES operation functionality for ZynqMP. + */ + +#ifndef ZYNQMP_AES_H +#define ZYNQMP_AES_H + +struct zynqmp_aes { + u64 srcaddr; + u64 ivaddr; + u64 keyaddr; + u64 dstaddr; + u64 len; + u64 op; + u64 keysrc; +}; + +/* + * Performs an aes operation using the pmu firmware + * + * @param aes The aes operation buffer that must have been allocated using + * ALLOC_CACHE_ALIGN_BUFFER(struct zynqmp_aes, aes, 1). + * @return 0 in case of success, in case of an errer any other value. + */ +int zynqmp_aes_operation(struct zynqmp_aes *aes); + +#endif /* ZYNQMP_AES_H */ diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c index e20030ecda..76be17e7ae 100644 --- a/board/xilinx/zynqmp/cmds.c +++ b/board/xilinx/zynqmp/cmds.c @@ -14,16 +14,7 @@ #include <asm/arch/hardware.h> #include <asm/arch/sys_proto.h> #include <asm/io.h> - -struct aes { - u64 srcaddr; - u64 ivaddr; - u64 keyaddr; - u64 dstaddr; - u64 len; - u64 op; - u64 keysrc; -}; +#include <mach/zynqmp_aes.h> static int do_zynqmp_verify_secure(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) @@ -121,9 +112,8 @@ static int do_zynqmp_mmio_write(struct cmd_tbl *cmdtp, int flag, int argc, static int do_zynqmp_aes(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]) { - ALLOC_CACHE_ALIGN_BUFFER(struct aes, aes, 1); + ALLOC_CACHE_ALIGN_BUFFER(struct zynqmp_aes, aes, 1); int ret; - u32 ret_payload[PAYLOAD_ARG_CNT]; if (zynqmp_firmware_version() <= PMUFW_V1_0) { puts("ERR: PMUFW v1.0 or less is detected\n"); @@ -142,40 +132,18 @@ static int do_zynqmp_aes(struct cmd_tbl *cmdtp, int flag, int argc, aes->keysrc = hextoul(argv[6], NULL); aes->dstaddr = hextoul(argv[7], NULL); - if (aes->srcaddr && aes->ivaddr && aes->dstaddr) { - flush_dcache_range(aes->srcaddr, - (aes->srcaddr + - roundup(aes->len, ARCH_DMA_MINALIGN))); - flush_dcache_range(aes->ivaddr, - (aes->ivaddr + - roundup(IV_SIZE, ARCH_DMA_MINALIGN))); - flush_dcache_range(aes->dstaddr, - (aes->dstaddr + - roundup(aes->len, ARCH_DMA_MINALIGN))); - } - if (aes->keysrc == 0) { if (argc < cmdtp->maxargs) return CMD_RET_USAGE; aes->keyaddr = hextoul(argv[8], NULL); - if (aes->keyaddr) - flush_dcache_range(aes->keyaddr, - (aes->keyaddr + - roundup(KEY_PTR_LEN, - ARCH_DMA_MINALIGN))); } - flush_dcache_range((ulong)aes, (ulong)(aes) + - roundup(sizeof(struct aes), ARCH_DMA_MINALIGN)); - - ret = xilinx_pm_request(PM_SECURE_AES, upper_32_bits((ulong)aes), - lower_32_bits((ulong)aes), 0, 0, ret_payload); - if (ret || ret_payload[1]) - printf("Failed: AES op status:0x%x, errcode:0x%x\n", - ret, ret_payload[1]); + ret = zynqmp_aes_operation(aes); + if (ret) + return CMD_RET_FAILURE; - return ret; + return 0; } #ifdef CONFIG_DEFINE_TCM_OCM_MMAP -- 2.34.1