> From: Hugo Villeneuve <hvillene...@dimonoff.com> > For SOM with the EC configuration, the ethernet PHY is located on the > SOM itself, and connected to the CPU ethernet controller. It has a > reset line controlled via GPIO1_IO9. In this configuration, the PHY > located on the carrier board is not connected to anything and is > therefore not used. > For SOM without EC configuration, the ethernet PHY on the carrier > board is connected to the CPU ethernet controller. It has a reset line > controlled via the GPIO expander PCA9534_IO5. > The hardware configuration (EC) is determined at runtime by > reading from the SOM EEPROM. > To support both hardware configurations (EC and non-EC), adjust/fix > the PHY reset gpios according to the hardware configuration > read at runtime from the SOM EEPROM. This adjustement is done in > U-Boot (OF_BOARD_FIXUP) and kernel (OF_BOARD_SETUP) device trees. > Signed-off-by: Hugo Villeneuve <hvillene...@dimonoff.com> Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Erika Unter HRB 165235 Munich, Office: Kirchenstr.5, 82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =====================================================================
