---
Resent with correct email addresses
Changes in v4:
- tweaked the defconfig as reviewed by Jonas
- moved some of bootph-all to rk3588s-u-boot.dtsi
- renamed fdt fixup function
Changes in v3:
- forgot to add defconfig and include file, added now, sorry
Changes in v2:
-fixed wrong Kconfig text (rk3588s instead of rk3588)
-changed doc name (rk3588s instead of rk3588)
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi | 34 ++++++++++
arch/arm/dts/rk3588s-rock-5a.dts | 73 +++++++++++++++++++++
arch/arm/mach-rockchip/rk3588/Kconfig | 28 ++++++++
board/radxa/rock5a-rk3588s/Kconfig | 15 +++++
board/radxa/rock5a-rk3588s/MAINTAINERS | 6 ++
board/radxa/rock5a-rk3588s/Makefile | 6 ++
board/radxa/rock5a-rk3588s/rock5a-rk3588s.c | 39 +++++++++++
configs/rock5a-rk3588s_defconfig | 72 ++++++++++++++++++++
doc/board/rockchip/rockchip.rst | 1 +
include/configs/rock5a-rk3588s.h | 15 +++++
11 files changed, 290 insertions(+)
create mode 100644 arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3588s-rock-5a.dts
create mode 100644 board/radxa/rock5a-rk3588s/Kconfig
create mode 100644 board/radxa/rock5a-rk3588s/MAINTAINERS
create mode 100644 board/radxa/rock5a-rk3588s/Makefile
create mode 100644 board/radxa/rock5a-rk3588s/rock5a-rk3588s.c
create mode 100644 configs/rock5a-rk3588s_defconfig
create mode 100644 include/configs/rock5a-rk3588s.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 480269fa6065..cd9b96c5ba7c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -174,6 +174,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
dtb-$(CONFIG_ROCKCHIP_RK3588) += \
rk3588-edgeble-neu6a-io.dtb \
rk3588-evb1-v10.dtb \
+ rk3588s-rock-5a.dtb \
rk3588-rock-5b.dtb
dtb-$(CONFIG_ROCKCHIP_RV1108) += \
diff --git a/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
b/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
new file mode 100644
index 000000000000..9bb0e4f89e11
--- /dev/null
+++ b/arch/arm/dts/rk3588s-rock-5a-u-boot.dtsi
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Collabora Ltd.
+ */
+
+#include "rk3588s-u-boot.dtsi"
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/usb/pd.h>
+
+/ {
+ aliases {
+ mmc1 = &sdmmc;
+ };
+
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
+ };
+};
+
+&sdmmc {
+ bus-width = <4>;
+ status = "okay";
+};
+
+&sdhci {
+ cap-mmc-highspeed;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_data_strobe
&emmc_rstnout>;
+};
+
diff --git a/arch/arm/dts/rk3588s-rock-5a.dts b/arch/arm/dts/rk3588s-rock-5a.dts
new file mode 100644
index 000000000000..901825514f9d
--- /dev/null
+++ b/arch/arm/dts/rk3588s-rock-5a.dts
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk3588s.dtsi"
+
+/ {
+ model = "Radxa ROCK 5 Model A";
+ compatible = "radxa,rock-5a", "rockchip,rk3588s";
+
+ aliases {
+ mmc0 = &sdhci;
+ serial2 = &uart2;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+};
+
+&gmac1 {
+ clock_in_out = "output";
+ phy-handle = <&rgmii_phy1>;
+ phy-mode = "rgmii";
+ pinctrl-0 = <&gmac1_miim
+ &gmac1_tx_bus2
+ &gmac1_rx_bus2
+ &gmac1_rgmii_clk
+ &gmac1_rgmii_bus>;
+ pinctrl-names = "default";
+ tx_delay = <0x3a>;
+ rx_delay = <0x3e>;
+ status = "okay";
+};
+
+&mdio1 {
+ rgmii_phy1: ethernet-phy@1 {
+ /* RTL8211F */
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0x1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtl8211f_rst>;
+ reset-assert-us = <20000>;
+ reset-deassert-us = <100000>;
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pinctrl {
+ rtl8211f {
+ rtl8211f_rst: rtl8211f-rst {
+ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&sdhci {
+ bus-width = <8>;
+ no-sdio;
+ no-sd;
+ non-removable;
+ max-frequency = <200000000>;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2m0_xfer>;
+ status = "okay";
+};
diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig
b/arch/arm/mach-rockchip/rk3588/Kconfig
index b7d5f13bebbf..90d389137ade 100644
--- a/arch/arm/mach-rockchip/rk3588/Kconfig
+++ b/arch/arm/mach-rockchip/rk3588/Kconfig
@@ -19,6 +19,33 @@ config TARGET_RK3588_NEU6
IO board and Neu6a needs to mount on top of this IO board in order to
create complete Edgeble Neural Compute Module 6(Neu6) IO platform.
+config TARGET_ROCK5A_RK3588
+ bool "Radxa ROCK5A RK3588 board"
+ select BOARD_LATE_INIT
+ help
+ Radxa ROCK5A is a Rockchip RK3588S based SBC (Single Board Computer)
+ by Radxa.
+
+ There are tree variants depending on the DRAM size : 4G, 8G and 16G.
+
+ Specification:
+
+ Rockchip Rk3588S SoC
+ 4x ARM Cortex-A76, 4x ARM Cortex-A55
+ 4/8/16GB memory LPDDR4x
+ Mali G610MC4 GPU
+ MIPI CSI 2 multiple lanes connector
+ 4-lane MIPI DSI connector
+ Audio – 3.5mm earphone jack
+ eMMC module connector
+ uSD slot (up to 128GB)
+ 2x USB 2.0, 2x USB 3.0
+ 2x micro HDMI 2.1 ports, one up to 8Kp60, the other up to 4Kp60
+ Gigabit Ethernet RJ45 with optional PoE support
+ 40-pin IO header including UART, SPI, I2C and 5V DC power in
+ USB PD over USB Type-C
+ Size: 85mm x 56mm (Raspberry Pi 4 form factor)
+
config TARGET_ROCK5B_RK3588
bool "Radxa ROCK5B RK3588 board"
select BOARD_LATE_INIT
@@ -58,6 +85,7 @@ config SYS_MALLOC_F_LEN
source board/edgeble/neural-compute-module-6/Kconfig
source board/rockchip/evb_rk3588/Kconfig
+source board/radxa/rock5a-rk3588s/Kconfig
source board/radxa/rock5b-rk3588/Kconfig
endif
diff --git a/board/radxa/rock5a-rk3588s/Kconfig
b/board/radxa/rock5a-rk3588s/Kconfig
new file mode 100644
index 000000000000..2d7fc85df4fe
--- /dev/null
+++ b/board/radxa/rock5a-rk3588s/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_ROCK5A_RK3588
+
+config SYS_BOARD
+ default "rock5a-rk3588s"
+
+config SYS_VENDOR
+ default "radxa"
+
+config SYS_CONFIG_NAME
+ default "rock5a-rk3588s"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
diff --git a/board/radxa/rock5a-rk3588s/MAINTAINERS
b/board/radxa/rock5a-rk3588s/MAINTAINERS
new file mode 100644
index 000000000000..26e0ed93386b
--- /dev/null
+++ b/board/radxa/rock5a-rk3588s/MAINTAINERS
@@ -0,0 +1,6 @@
+ROCK5A-RK3588
+M: Eugen Hristev <eugen.hris...@collabora.com>
+S: Maintained
+F: board/radxa/rock5a-rk3588s
+F: include/configs/rock5a-rk3588.h
+F: configs/rock5a-rk3588_defconfig
diff --git a/board/radxa/rock5a-rk3588s/Makefile
b/board/radxa/rock5a-rk3588s/Makefile
new file mode 100644
index 000000000000..48dd51245508
--- /dev/null
+++ b/board/radxa/rock5a-rk3588s/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2023 Collabora Ltd.
+#
+
+obj-y += rock5a-rk3588s.o
diff --git a/board/radxa/rock5a-rk3588s/rock5a-rk3588s.c
b/board/radxa/rock5a-rk3588s/rock5a-rk3588s.c
new file mode 100644
index 000000000000..2d7a8c07dc5f
--- /dev/null
+++ b/board/radxa/rock5a-rk3588s/rock5a-rk3588s.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 Collabora Ltd.
+ */
+
+#include <fdtdec.h>
+#include <fdt_support.h>
+
+#ifdef CONFIG_OF_BOARD_SETUP
+int rock5a_add_reserved_memory_fdt_nodes(void *new_blob)
+{
+ struct fdt_memory gap1 = {
+ .start = 0x3fc000000,
+ .end = 0x3fc4fffff,
+ };
+ struct fdt_memory gap2 = {
+ .start = 0x3fff00000,
+ .end = 0x3ffffffff,
+ };
+ unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
+ unsigned int ret;
+
+ /*
+ * Inject the reserved-memory nodes into the DTS
+ */
+ ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
+ NULL, flags);
+ if (ret)
+ return ret;
+
+ return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
+ NULL, flags);
+}
+
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+ return rock5a_add_reserved_memory_fdt_nodes(blob);
+}
+#endif
diff --git a/configs/rock5a-rk3588s_defconfig b/configs/rock5a-rk3588s_defconfig
new file mode 100644
index 000000000000..6cbd9817c528
--- /dev/null
+++ b/configs/rock5a-rk3588s_defconfig
@@ -0,0 +1,72 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_DEFAULT_DEVICE_TREE="rk3588s-rock-5a"
+CONFIG_ROCKCHIP_RK3588=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x1000000
+CONFIG_TARGET_ROCK5A_RK3588=y
+CONFIG_SPL_STACK=0x1000000
+CONFIG_DEBUG_UART_BASE=0xFEB50000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-rock-5a.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks
assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_ERRNO_STR=y
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index 99376fb54c90..59d69f07018f 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -99,6 +99,7 @@ List of mainline supported Rockchip boards:
* rk3588
- Rockchip EVB (evb-rk3588)
- Edgeble Neural Compute Module 6 SoM - Neu6a (neu6a-io-rk3588)
+ - Radxa ROCK 5A (rock5a-rk3588s)
- Radxa ROCK 5B (rock5b-rk3588)
* rv1108
diff --git a/include/configs/rock5a-rk3588s.h b/include/configs/rock5a-rk3588s.h
new file mode 100644
index 000000000000..9a2d3ee9f536
--- /dev/null
+++ b/include/configs/rock5a-rk3588s.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2023 Collabora Ltd.
+ */
+
+#ifndef __ROCK5A_RK3588_H
+#define __ROCK5A_RK3588_H
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
+
+#include <configs/rk3588_common.h>
+
+#endif /* __ROCK5A_RK3588_H */