Hi Leo, On Wed, Aug 2, 2023 at 1:49 PM Leo Liang <ycli...@andestech.com> wrote: > > Hi Tom, > > The following changes since commit 7755b2200777f72dca87dd169138e95f011bbcb9: > > Merge tag 'x86-pull-20230801' of > https://source.denx.de/u-boot/custodians/u-boot-x86 (2023-08-01 11:57:55 > -0400) > > are available in the Git repository at: > > https://source.denx.de/u-boot/custodians/u-boot-riscv.git > > for you to fetch changes up to 093bd0354e5b947b0bd634bf5ed4041ba075b57d: > > acpi: Add missing RISC-V acpi_table header (2023-08-02 11:02:33 +0800) > > CI result shows no issue: > https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/17177 > > ---------------------------------------------------------------- > > + Fix compilation error for CI when enabling RTL8169 driver > + Fix compilation error for pci_mmc.c by adding acpi_table header file > + Support StarFive JH7110 PCIe driver > + Enable PCI on Unmatched board > > ---------------------------------------------------------------- > > Heinrich Schuchardt (2): > riscv: sifive: initialize PCI on Unmatched > acpi: Add missing RISC-V acpi_table header > > Mason Huo (3): > starfive: pci: Add StarFive JH7110 pcie driver > configs: starfive-jh7110: Add support for PCIe host driver > riscv: dts: starfive: Enable PCIe host controller > > Minda Chen (5): > i2c: designware: Add Kconfig for designware_i2c_pci.c > net: rtl8169: Fix compile warning in rtl8169 > net: rtl8169: Fix DMA minimal aligned compile warning in RISC-V > net: rtl8169: Add one device ID 0x8161 > configs: starfive-jh7110: Add CONFIG_RTL8169 >
Looks the second half of this series is missed? https://patchwork.ozlabs.org/project/uboot/list/?series=365237 Regards, Bin
