Some board models (such as the submitted P2020-based HWW-1U-1A hardware)
need specialized code to run when a reset is requested to ensure proper
synchronization with other hardware.
In order to facilitate such board ports, we add a board_reset_r()
routine which is called from the do_reset() command function instead of
directly poking at the MPC85xx "RSTCR" (reset control) register.
Signed-off-by: Kyle Moffett <kyle.d.moff...@boeing.com>
---
arch/powerpc/cpu/mpc85xx/cpu.c | 7 +++++--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 1aad2ba..dbc662f 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -204,8 +204,10 @@ int checkcpu (void)
int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
-/* Everything after the first generation of PQ3 parts has RSTCR */
-#if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
+#if defined(CONFIG_BOARD_RESET_R)
+ extern void board_reset_r(void);
+ board_reset_r();
+#elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
defined(CONFIG_MPC8555) || defined(CONFIG_MPC8560)
unsigned long val, msr;
@@ -221,6 +223,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
val |= 0x70000000;
mtspr(DBCR0,val);
#else
+ /* Everything after the first generation of PQ3 parts has RSTCR */
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
out_be32(&gur->rstcr, 0x2); /* HRESET_REQ */
udelay(100);
--
1.7.2.3
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