On Thu, 17 Aug 2023 at 23:26, Chanho Park <chanho61.p...@samsung.com> wrote:
>
> Since the Patch 55171aedda88, VisionFive2 booting has been broken [1].
> VisionFive2 board requires to enable CONFIG_TIMER_EARLY but booting went
> to panic from initr_dm_devices due to lack of a timer device.
>
> - Error logs
> initcall sequence 00000000fffd8d38 failed at call 00000000402185e4
> (err=-19)
>
> Thus, we need to move riscv_cpu_probe function in order to register
> the timer earlier than initr_dm_devices.
>
> Fixes: 7fe32b3442f0 ("event: Convert arch_cpu_init_dm() to use events")
> Cc: Simon Glass <s...@chromium.org>
> Cc: Bin Meng <bmeng...@gmail.com>
> Signed-off-by: Chanho Park <chanho61.p...@samsung.com>
> ---
> arch/riscv/cpu/cpu.c | 11 +++--------
> 1 file changed, 3 insertions(+), 8 deletions(-)
Applied to u-boot-dm, thanks!
>
> diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
> index ecfb1fb08c4b..0b4208e72199 100644
> --- a/arch/riscv/cpu/cpu.c
> +++ b/arch/riscv/cpu/cpu.c
> @@ -66,7 +66,7 @@ static inline bool supports_extension(char ext)
> #endif /* CONFIG_CPU */
> }
>
> -static int riscv_cpu_probe(void)
> +static int riscv_cpu_probe(void *ctx, struct event *event)
> {
> #ifdef CONFIG_CPU
> int ret;
> @@ -79,6 +79,7 @@ static int riscv_cpu_probe(void)
>
> return 0;
> }
> +EVENT_SPY(EVT_DM_POST_INIT_R, riscv_cpu_probe);
>
> /*
> * This is called on secondary harts just after the IPI is init'd. Currently
> @@ -95,7 +96,7 @@ int riscv_cpu_setup(void *ctx, struct event *event)
> {
> int ret;
>
> - ret = riscv_cpu_probe();
> + ret = riscv_cpu_probe(ctx, event);
> if (ret)
> return ret;
>
> @@ -149,12 +150,6 @@ EVENT_SPY(EVT_DM_POST_INIT_F, riscv_cpu_setup);
>
> int arch_early_init_r(void)
> {
> - int ret;
> -
> - ret = riscv_cpu_probe();
> - if (ret)
> - return ret;
> -
> if (IS_ENABLED(CONFIG_SYSRESET_SBI))
> device_bind_driver(gd->dm_root, "sbi-sysreset",
> "sbi-sysreset", NULL);
> --
> 2.39.2
>
