Hi Neal,

regarding subject.

arm64: zynqmp: Add output-enable pins for kr260-revB

should be better option.

On 8/30/23 08:57, Neal Frager wrote:
Now that the zynqmp pinctrl driver supports the tri-state registers, this patch

remove "this patch"

makes sure that the pins requiring output-enable are configured appropriately
for the KR260 Starter Kit.

Without this patch, the USB to SD card bridge on the KR260 starter kit is not
enabled correctly when booting via SPL.  This causes u-boot to fail to detect
the SD card interface.

SPL connection is misleading because pins are configured as the part of pinctrl interface which SPL is not using or calling.
SPL in this config is just using QSPI which is already configured properly.
On KR260 SD card is connected via USB to SD convertor that's why pinctrl set usb pins up. By correctly setting up usb pins you get also SD working.

The patch itself is working fine.
Actually the same issues are there for kv260 boards and also kr260-revA. I think we should fix all of them at once.
I did it for kv260 revB.
Do you want to do it? Or is it fine if we look and test others and provide v2 version of your patch?

Thanks,
Michal

diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
index f935f25c887f..1b1d9e772f55 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
@@ -193,6 +193,7 @@
                conf-tx {
                        pins = "MIO36";
                        bias-disable;
+                       output-enable;
                };

                mux {
@@ -244,6 +245,7 @@
                conf-bootstrap {
                        pins = "MIO71", "MIO73", "MIO75";
                        bias-disable;
+                       output-enable;
                        low-power-disable;
                };

@@ -251,6 +253,7 @@
                        pins = "MIO64", "MIO65", "MIO66",
                                "MIO67", "MIO68", "MIO69";
                        bias-disable;
+                       output-enable;
                        low-power-enable;
                };

@@ -259,6 +262,7 @@
                        slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                        bias-disable;
+                       output-enable;
                };

                mux-mdio {
@@ -289,6 +293,7 @@
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                        "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       output-enable;
                        drive-strength = <4>;
                        slew-rate = <SLEW_RATE_SLOW>;




Signed-off-by: Neal Frager <neal.fra...@amd.com>
---
  arch/arm/dts/zynqmp-sck-kr-g-revB.dts | 6 ++++++
  1 file changed, 6 insertions(+)

diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts 
b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts
index 1ebbe683f3..104e67ddf8 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dts
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dts
@@ -248,6 +248,7 @@
                conf-tx {
                        pins = "MIO36";
                        bias-disable;
+                       output-enable;
                };
mux {
@@ -299,6 +300,7 @@
                conf-bootstrap {
                        pins = "MIO45", "MIO47", "MIO49";
                        bias-disable;
+                       output-enable;
                        low-power-disable;
                };
@@ -306,6 +308,7 @@
                        pins = "MIO38", "MIO39", "MIO40",
                                "MIO41", "MIO42", "MIO43";
                        bias-disable;
+                       output-enable;
                        low-power-enable;
                };
@@ -314,6 +317,7 @@
                        slew-rate = <SLEW_RATE_SLOW>;
                        power-source = <IO_STANDARD_LVCMOS18>;
                        bias-disable;
+                       output-enable;
                };
mux-mdio {
@@ -344,6 +348,7 @@
                        pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
                        "MIO60", "MIO61", "MIO62", "MIO63";
                        bias-disable;
+                       output-enable;
                        drive-strength = <4>;
                        slew-rate = <SLEW_RATE_SLOW>;
                };
@@ -371,6 +376,7 @@
                        pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
                        "MIO72", "MIO73", "MIO74", "MIO75";
                        bias-disable;
+                       output-enable;
                        drive-strength = <4>;
                        slew-rate = <SLEW_RATE_SLOW>;
                };

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