On Fri, 2023-09-08 at 16:35 +0530, Apurva Nandan wrote: > Add support for DMA in J784S4 SoC. > > Signed-off-by: Jayesh Choudhary <j-choudh...@ti.com> > Signed-off-by: Hari Nagalla <hnaga...@ti.com> > Signed-off-by: Apurva Nandan <a-nan...@ti.com> > --- > drivers/dma/ti/Makefile | 1 + > drivers/dma/ti/k3-psil-j784s4.c | 166 ++++++++++++++++++++++++++ > drivers/dma/ti/k3-psil-priv.h | 1 + > drivers/dma/ti/k3-psil.c | 2 + > drivers/firmware/ti_sci_static_data.h | 34 ++++++ > drivers/ram/Kconfig | 2 +- > 6 files changed, 205 insertions(+), 1 deletion(-) > create mode 100644 drivers/dma/ti/k3-psil-j784s4.c > > diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile > index 6807eb8e8b..bd4ce68d9c 100644 > --- a/drivers/dma/ti/Makefile > +++ b/drivers/dma/ti/Makefile > @@ -8,3 +8,4 @@ k3-psil-data-$(CONFIG_SOC_K3_J721E) += k3-psil-j721e.o > k3-psil-data-$(CONFIG_SOC_K3_J721S2) += k3-psil-j721s2.o > k3-psil-data-$(CONFIG_SOC_K3_AM642) += k3-psil-am64.o > k3-psil-data-$(CONFIG_SOC_K3_AM625) += k3-psil-am62.o > +k3-psil-data-$(CONFIG_SOC_K3_J784S4) += k3-psil-j784s4.o > diff --git a/drivers/dma/ti/k3-psil-j784s4.c b/drivers/dma/ti/k3-psil-j784s4.c > new file mode 100644 > index 0000000000..d62d5e9c33 > --- /dev/null > +++ b/drivers/dma/ti/k3-psil-j784s4.c > @@ -0,0 +1,166 @@ > +// SPDX-License-Identifier: GPL-2.0
Should be: GPL-2.0-only > +/* > + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com > + */ > +#include <linux/kernel.h> > + > +#include "k3-psil-priv.h" > + > +#define PSIL_PDMA_XY_TR(x) \ > + { \ > + .thread_id = x, \ > + .ep_config = { \ > + .ep_type = PSIL_EP_PDMA_XY, \ > + }, \ > + } > + > +#define PSIL_PDMA_XY_PKT(x) \ > + { \ > + .thread_id = x, \ > + .ep_config = { \ > + .ep_type = PSIL_EP_PDMA_XY, \ > + .pkt_mode = 1, \ > + }, \ > + } > + > +#define PSIL_PDMA_MCASP(x) \ > + { \ > + .thread_id = x, \ > + .ep_config = { \ > + .ep_type = PSIL_EP_PDMA_XY, \ > + .pdma_acc32 = 1, \ > + .pdma_burst = 1, \ > + }, \ > + } > + > +#define PSIL_ETHERNET(x) \ > + { \ > + .thread_id = x, \ > + .ep_config = { \ > + .ep_type = PSIL_EP_NATIVE, \ > + .pkt_mode = 1, \ > + .needs_epib = 1, \ > + .psd_size = 16, \ > + }, \ > + } > + > +#define PSIL_SA2UL(x, tx) \ > + { \ > + .thread_id = x, \ > + .ep_config = { \ > + .ep_type = PSIL_EP_NATIVE, \ > + .pkt_mode = 1, \ > + .needs_epib = 1, \ > + .psd_size = 64, \ > + .notdpkt = tx, \ > + }, \ > + } > + > +/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */ > +static struct psil_ep j784s4_src_ep_map[] = { > + /* PDMA_MCASP - McASP0-4 */ > + PSIL_PDMA_MCASP(0x4400), > + PSIL_PDMA_MCASP(0x4401), > + PSIL_PDMA_MCASP(0x4402), > + PSIL_PDMA_MCASP(0x4403), > + PSIL_PDMA_MCASP(0x4404), > + /* PDMA_SPI_G0 - SPI0-3 */ > + PSIL_PDMA_XY_PKT(0x4600), > + PSIL_PDMA_XY_PKT(0x4601), > + PSIL_PDMA_XY_PKT(0x4602), > + PSIL_PDMA_XY_PKT(0x4603), > + PSIL_PDMA_XY_PKT(0x4604), > + PSIL_PDMA_XY_PKT(0x4605), > + PSIL_PDMA_XY_PKT(0x4606), > + PSIL_PDMA_XY_PKT(0x4607), > + PSIL_PDMA_XY_PKT(0x4608), > + PSIL_PDMA_XY_PKT(0x4609), > + PSIL_PDMA_XY_PKT(0x460a), > + PSIL_PDMA_XY_PKT(0x460b), > + PSIL_PDMA_XY_PKT(0x460c), > + PSIL_PDMA_XY_PKT(0x460d), > + PSIL_PDMA_XY_PKT(0x460e), > + PSIL_PDMA_XY_PKT(0x460f), > + /* PDMA_SPI_G1 - SPI4-7 */ > + PSIL_PDMA_XY_PKT(0x4610), > + PSIL_PDMA_XY_PKT(0x4611), > + PSIL_PDMA_XY_PKT(0x4612), > + PSIL_PDMA_XY_PKT(0x4613), > + PSIL_PDMA_XY_PKT(0x4614), > + PSIL_PDMA_XY_PKT(0x4615), > + PSIL_PDMA_XY_PKT(0x4616), > + PSIL_PDMA_XY_PKT(0x4617), > + PSIL_PDMA_XY_PKT(0x4618), > + PSIL_PDMA_XY_PKT(0x4619), > + PSIL_PDMA_XY_PKT(0x461a), > + PSIL_PDMA_XY_PKT(0x461b), > + PSIL_PDMA_XY_PKT(0x461c), > + PSIL_PDMA_XY_PKT(0x461d), > + PSIL_PDMA_XY_PKT(0x461e), > + PSIL_PDMA_XY_PKT(0x461f), > + /* PDMA_USART_G0 - UART0-1 */ > + PSIL_PDMA_XY_PKT(0x4700), > + PSIL_PDMA_XY_PKT(0x4701), > + /* PDMA_USART_G1 - UART2-3 */ > + PSIL_PDMA_XY_PKT(0x4702), > + PSIL_PDMA_XY_PKT(0x4703), > + /* PDMA_USART_G2 - UART4-9 */ > + PSIL_PDMA_XY_PKT(0x4704), > + PSIL_PDMA_XY_PKT(0x4705), > + PSIL_PDMA_XY_PKT(0x4706), > + PSIL_PDMA_XY_PKT(0x4707), > + PSIL_PDMA_XY_PKT(0x4708), > + PSIL_PDMA_XY_PKT(0x4709), > + /* CPSW0 */ > + PSIL_ETHERNET(0x7000), > + /* MCU_PDMA0 (MCU_PDMA_MISC_G0) - SPI0 */ > + PSIL_PDMA_XY_PKT(0x7100), > + PSIL_PDMA_XY_PKT(0x7101), > + PSIL_PDMA_XY_PKT(0x7102), > + PSIL_PDMA_XY_PKT(0x7103), > + /* MCU_PDMA1 (MCU_PDMA_MISC_G1) - SPI1-2 */ > + PSIL_PDMA_XY_PKT(0x7200), > + PSIL_PDMA_XY_PKT(0x7201), > + PSIL_PDMA_XY_PKT(0x7202), > + PSIL_PDMA_XY_PKT(0x7203), > + PSIL_PDMA_XY_PKT(0x7204), > + PSIL_PDMA_XY_PKT(0x7205), > + PSIL_PDMA_XY_PKT(0x7206), > + PSIL_PDMA_XY_PKT(0x7207), > + /* MCU_PDMA2 (MCU_PDMA_MISC_G2) - UART0 */ > + PSIL_PDMA_XY_PKT(0x7300), > + /* MCU_PDMA_ADC - ADC0-1 */ > + PSIL_PDMA_XY_TR(0x7400), > + PSIL_PDMA_XY_TR(0x7401), > + PSIL_PDMA_XY_TR(0x7402), > + PSIL_PDMA_XY_TR(0x7403), > + /* SA2UL */ > + PSIL_SA2UL(0x7500, 0), > + PSIL_SA2UL(0x7501, 0), > + PSIL_SA2UL(0x7502, 0), > + PSIL_SA2UL(0x7503, 0), > +}; > + > +/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */ > +static struct psil_ep j784s4_dst_ep_map[] = { > + /* CPSW0 */ > + PSIL_ETHERNET(0xf000), > + PSIL_ETHERNET(0xf001), > + PSIL_ETHERNET(0xf002), > + PSIL_ETHERNET(0xf003), > + PSIL_ETHERNET(0xf004), > + PSIL_ETHERNET(0xf005), > + PSIL_ETHERNET(0xf006), > + PSIL_ETHERNET(0xf007), > + /* SA2UL */ > + PSIL_SA2UL(0xf500, 1), > + PSIL_SA2UL(0xf501, 1), > +}; > + > +struct psil_ep_map j784s4_ep_map = { > + .name = "j784s4", > + .src = j784s4_src_ep_map, > + .src_count = ARRAY_SIZE(j784s4_src_ep_map), > + .dst = j784s4_dst_ep_map, > + .dst_count = ARRAY_SIZE(j784s4_dst_ep_map), > +}; > diff --git a/drivers/dma/ti/k3-psil-priv.h b/drivers/dma/ti/k3-psil-priv.h > index 28078c6bd8..634bf2ca19 100644 > --- a/drivers/dma/ti/k3-psil-priv.h > +++ b/drivers/dma/ti/k3-psil-priv.h > @@ -42,5 +42,6 @@ extern struct psil_ep_map j721e_ep_map; > extern struct psil_ep_map j721s2_ep_map; > extern struct psil_ep_map am64_ep_map; > extern struct psil_ep_map am62_ep_map; > +extern struct psil_ep_map j784s4_ep_map; > > #endif /* K3_PSIL_PRIV_H_ */ > diff --git a/drivers/dma/ti/k3-psil.c b/drivers/dma/ti/k3-psil.c > index f23c8ca2b7..10383b4abf 100644 > --- a/drivers/dma/ti/k3-psil.c > +++ b/drivers/dma/ti/k3-psil.c > @@ -26,6 +26,8 @@ struct psil_endpoint_config *psil_get_ep_config(u32 > thread_id) > soc_ep_map = &am64_ep_map; > else if (IS_ENABLED(CONFIG_SOC_K3_AM625)) > soc_ep_map = &am62_ep_map; > + else if (IS_ENABLED(CONFIG_SOC_K3_J784S4)) > + soc_ep_map = &j784s4_ep_map; > } > > if (thread_id & K3_PSIL_DST_THREAD_ID_OFFSET && soc_ep_map->dst) { > diff --git a/drivers/firmware/ti_sci_static_data.h > b/drivers/firmware/ti_sci_static_data.h > index 1a461fab61..0b95412551 100644 > --- a/drivers/firmware/ti_sci_static_data.h > +++ b/drivers/firmware/ti_sci_static_data.h > @@ -97,6 +97,40 @@ static struct ti_sci_resource_static_data rm_static_data[] > = { > }; > #endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 */ > > +#if IS_ENABLED(CONFIG_SOC_K3_J784S4) > +static struct ti_sci_resource_static_data rm_static_data[] = { > + /* Free rings */ > + { > + .dev_id = 328, > + .subtype = 1, > + .range_start = 208, > + .range_num = 32, > + }, > + /* TX channels */ > + { > + .dev_id = 329, > + .subtype = 13, > + .range_start = 40, > + .range_num = 3, > + }, > + /* RX channels */ > + { > + .dev_id = 329, > + .subtype = 10, > + .range_start = 40, > + .range_num = 3, > + }, > + /* RX Free flows */ > + { > + .dev_id = 329, > + .subtype = 0, > + .range_start = 84, > + .range_num = 8, > + }, > + { }, > +}; > +#endif /* CONFIG_SOC_K3_J784S4 */ > + > #else > static struct ti_sci_resource_static_data rm_static_data[] = { > { }, > diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig > index bf99964577..c7d5d0c680 100644 > --- a/drivers/ram/Kconfig > +++ b/drivers/ram/Kconfig > @@ -62,7 +62,7 @@ choice > depends on K3_DDRSS > prompt "K3 DDRSS Arch Support" > > - default K3_J721E_DDRSS if SOC_K3_J721E || SOC_K3_J721S2 > + default K3_J721E_DDRSS if SOC_K3_J721E || SOC_K3_J721S2 || > SOC_K3_J784S4 > default K3_AM64_DDRSS if SOC_K3_AM642 > default K3_AM64_DDRSS if SOC_K3_AM625 > default K3_AM62A_DDRSS if SOC_K3_AM62A7
