Hi Nishanth

On 25-Sep-23 7:32 PM, Nishanth Menon wrote:
On 16:09-20230922, Neha Malcom Francis wrote:
Sync k3-j721e DTS with kernel.org v6.6-rc1.

Give a summary of changes here - for example hbmc was disabled.


Signed-off-by: Neha Malcom Francis <n-fran...@ti.com>
---
  .../k3-j721e-common-proc-board-u-boot.dtsi    |  153 +--
  arch/arm/dts/k3-j721e-common-proc-board.dts   |  513 ++++++---
  arch/arm/dts/k3-j721e-main.dtsi               | 1018 +++++++++++++++--
  arch/arm/dts/k3-j721e-mcu-wakeup.dtsi         |  305 ++++-
  .../arm/dts/k3-j721e-r5-common-proc-board.dts |  325 +-----
  arch/arm/dts/k3-j721e-r5-sk.dts               |  529 +--------
  arch/arm/dts/k3-j721e-sk-u-boot.dtsi          |  184 +--
  arch/arm/dts/k3-j721e-sk.dts                  |  673 +++++++----
  arch/arm/dts/k3-j721e-som-p0.dtsi             |  217 ++--
  arch/arm/dts/k3-j721e-thermal.dtsi            |   75 ++
  arch/arm/dts/k3-j721e.dtsi                    |   32 +-
  11 files changed, 2380 insertions(+), 1644 deletions(-)
  create mode 100644 arch/arm/dts/k3-j721e-thermal.dtsi

diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi 
b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index 540c847eb3..64908c2056 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -3,83 +3,42 @@
   * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
   */

[...]

+&wkup_uart0_pins_default {
+       bootph-pre-ram;
+};
+
+&mcu_uart0_pins_default {
+       bootph-pre-ram;
+};

You need this only for R5, correct? then, why not move those two to R5
dts?

+
+&main_uart0_pins_default {
+       bootph-pre-ram;
  };
&main_usbss0_pins_default {
@@ -148,19 +114,6 @@
        bootph-pre-ram;
  };
-&mcu_cpsw {
-       reg = <0x0 0x46000000 0x0 0x200000>,
-             <0x0 0x40f00200 0x0 0x2>;
-       reg-names = "cpsw_nuss", "mac_efuse";
-       /delete-property/ ranges;
-
-       cpsw-phy-sel@40f04040 {
-               compatible = "ti,am654-cpsw-phy-sel";
-               reg= <0x0 0x40f04040 0x0 0x4>;
-               reg-names = "gmii-sel";
-       };
-};
-
  &main_mmc1_pins_default {
        bootph-pre-ram;
  };
@@ -169,8 +122,14 @@
        bootph-pre-ram;
  };
+&wkup_uart0 {
+       bootph-pre-ram;
+       status = "okay";
+};
+
  &wkup_i2c0 {
        bootph-pre-ram;
+       status = "okay";
  };
&main_i2c0 {
@@ -181,6 +140,10 @@
        bootph-pre-ram;
  };
+&main_esm {
+       bootph-pre-ram;
+};
+
  &exp2 {
        bootph-pre-ram;
  };
@@ -194,11 +157,7 @@
  };
&hbmc {
-       bootph-pre-ram;
-
-       flash@0,0 {
-               bootph-pre-ram;
-       };
+       status = "disabled";
OK - but then why have the node? or &hbmc_mux or the mux?
  };
&hbmc_mux {
@@ -244,31 +203,3 @@
  &main_r5fss1 {
        ti,cluster-mode = <0>;

I don't understand the override here.


[...]

diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts 
b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index 7bb5ce775c..950264ee16 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -9,19 +9,17 @@
  #include "k3-j721e-ddr-evm-lp4-4266.dtsi"
  #include "k3-j721e-ddr.dtsi"
  #include "k3-j721e-common-proc-board-u-boot.dtsi"
-#include <dt-bindings/phy/phy-cadence.h>
[...]
-&cbass_main {
-       main_esm: esm@700000 {
-               compatible = "ti,j721e-esm";
-               reg = <0x0 0x700000 0x0 0x1000>;
-               ti,esm-pins = <344>, <345>;
-               bootph-pre-ram;
-       };
+&mcu_timer0 {
+       status = "okay";
+       clock-frequency = <250000000>;
Document why clock-frequency

+       bootph-pre-ram;
  };

[...]

  &mcu_uart0 {
-       /delete-property/ power-domains;
-       /delete-property/ clocks;
-       /delete-property/ clock-names;
-       pinctrl-names = "default";
-       pinctrl-0 = <&mcu_uart0_pins_default>;
-       status = "okay";
        clock-frequency = <48000000>;

I have'nt seen us needing this elsewhere.

  };
-&main_uart0 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&main_uart0_pins_default>;
-       status = "okay";
-       power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
-};
-
  &main_sdhci0 {
-       /delete-property/ power-domains;
-       /delete-property/ assigned-clocks;
-       /delete-property/ assigned-clock-parents;
-       clock-names = "clk_xin";
-       clocks = <&clk_200mhz>;
-       ti,driver-strength-ohm = <50>;
-       non-removable;
-       bus-width = <8>;
+       clock-frequency = <200000000>;

I have'nt seen us needing this elsewhere.

  };
&main_sdhci1 {
-       /delete-property/ power-domains;
-       /delete-property/ assigned-clocks;
-       /delete-property/ assigned-clock-parents;
-       pinctrl-names = "default";
-       pinctrl-0 = <&main_mmc1_pins_default>;
-       clock-names = "clk_xin";
-       clocks = <&clk_200mhz>;
-       ti,driver-strength-ohm = <50>;
+       clock-frequency = <19200000>;

I have'nt seen us needing this elsewhere.

  };
&wkup_i2c0 {
@@ -293,97 +122,19 @@

I dont like the inclusion of tps659413a which is not in upstream
- document that in commit message.

  };
};

[...]

&mcu_ringacc {
@@ -393,31 +144,3 @@
  &mcu_udmap {
        ti,sci = <&dm_tifs>;
  };

Move the ra and udmap nodes ahead of the peripherals.

        [...]

diff --git a/arch/arm/dts/k3-j721e-r5-sk.dts b/arch/arm/dts/k3-j721e-r5-sk.dts
index 1cc64d07f7..0274465fa4 100644
--- a/arch/arm/dts/k3-j721e-r5-sk.dts
+++ b/arch/arm/dts/k3-j721e-r5-sk.dts

Unrelated to this patch: I noticed also that the DDR configuration for
J721e-sk is stale (0.6 rev of DDR tool Vs 0.10 for EVM)


For SK's R5 dts and u-boot.dtsi:
The above pattern of comments from EVM repeat on SK as well, I will skip
repeating the comments.

[...]


Thanks for reviewing, all are valid points. Regarding why clock-frequency is mentioned for a bunch of peripherals, I will be looking into it and accordingly posting v4.

Thanking You
Neha Malcom Francis

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