From: Jan Kiszka <jan.kis...@siemens.com> Since commit [1] A53 u-boot proper is broken. This is because nodes marked as 'bootph-pre-ram' are not available at u-boot proper before relocation.
To fix this we mark all nodes in u-boot.dtsi as 'bootph-all'. [1] 9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation") Signed-off-by: Jan Kiszka <jan.kis...@siemens.com> --- .../dts/k3-am65-iot2050-common-u-boot.dtsi | 44 +++++++++---------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi b/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi index 9fd64809a63..30fc7a78d89 100644 --- a/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi +++ b/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi @@ -37,18 +37,18 @@ }; leds { - bootph-pre-ram; + bootph-all; status-led-red { - bootph-pre-ram; + bootph-all; }; status-led-green { - bootph-pre-ram; + bootph-all; }; }; }; &cbass_mcu { - bootph-pre-ram; + bootph-all; mcu_navss: bus@28380000 { ringacc@2b800000 { @@ -75,70 +75,70 @@ }; &cbass_wakeup { - bootph-pre-ram; + bootph-all; }; &cbass_main { - bootph-pre-ram; + bootph-all; main_navss: bus@30800000 { - bootph-pre-ram; + bootph-all; }; }; &wkup_pmx0 { - bootph-pre-ram; + bootph-all; mcu-fss0-ospi0-pins-default { - bootph-pre-ram; + bootph-all; }; }; &main_pmx0 { - bootph-pre-ram; + bootph-all; main-uart1-pins-default { - bootph-pre-ram; + bootph-all; }; }; &main_uart1 { - bootph-pre-ram; + bootph-all; current-speed = <115200>; }; &wkup_gpio0 { - bootph-pre-ram; + bootph-all; }; &ospi0 { - bootph-pre-ram; + bootph-all; flash@0 { - bootph-pre-ram; + bootph-all; }; }; &secure_proxy_main { - bootph-pre-ram; + bootph-all; }; &dmsc { - bootph-pre-ram; + bootph-all; k3_sysreset: sysreset-controller { compatible = "ti,sci-sysreset"; - bootph-pre-ram; + bootph-all; }; }; &k3_pds { - bootph-pre-ram; + bootph-all; }; &k3_clks { - bootph-pre-ram; + bootph-all; }; &k3_reset { - bootph-pre-ram; + bootph-all; }; &fss { - bootph-pre-ram; + bootph-all; }; -- 2.35.3