On Sun, Oct 22, 2023 at 11:40:43PM +0200, Marek Vasut wrote: > The R-Car Gen3 SD_CLK_CTRL register does not use BIT(16) to implement > divider 1/1024, instead BIT(16) is reserved bit and divider 1/1024 is > not supported. The divider 1/1024 is specific to Socionext variant of > the IP, as is indicated by Linux commit: > > 0196c8db8363 ("mmc: tmio: move tmio_mmc_set_clock() to platform hook") > " > Socionext (and Panasonic) uses bit 10 (CLKSEL) for 1/1. Also, newer > versions of UniPhier SoC variants use bit 16 for 1/1024. > " > > Do not set the TMIO_SD_CAP_DIV1024 on Renesas R-Car platforms even if > the IP VERSION register does exist, and indicates IP version is newer > or equal to version 1.0 . The IP version 1.0 or newer does not imply > presence of the 1/1024 divider. > > Since the TMIO driver is used exactly by two supported platforms, that > is Renesas R-Car and Socionext UniPhier, it is OK to check whether the > TMIO_SD_CAP_RCAR capability is not set to identify the UniPhier platform > and add the capability only on that platform. > > Fixes: 58c35b17aa8f ("mmc: matsushita-common: Always check controller > version") > Signed-off-by: Marek Vasut <marek.vasut+rene...@mailbox.org>
I've confirmed that the 1/1024 divider doesn't exist in the RZ/G2L datasheet. Acked-by: Paul Barker <paul.barker...@bp.renesas.com>
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