From: Benjamin Szőke <egyszer...@freemail.hu>

Technexion PICO-IMX7 SoM is supporting USDHC3 (eMMC or micro SD on SoM)
and USDHC1 (SD on carrier board) to use on any carrier board like
PICO-NYMPH. Based on the U-Boot version from Technexion it adds
baseboard SD card boot detect to able to boot from selected USDHC1
or USDHC3 boot devices.

Signed-off-by: Benjamin Szőke <egyszer...@freemail.hu>
---
 arch/arm/dts/imx7d-pico-pi-u-boot.dtsi   | 11 +--
 board/technexion/pico-imx7d/Makefile     |  2 +-
 board/technexion/pico-imx7d/pico-imx7d.c | 53 +++++++++++++-
 board/technexion/pico-imx7d/spl.c        | 91 ++++++++++++++++++++++--
 include/configs/pico-imx7d.h             |  4 +-
 5 files changed, 146 insertions(+), 15 deletions(-)

diff --git a/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi 
b/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi
index 843b4583e5..3dd01e36a4 100644
--- a/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi
+++ b/arch/arm/dts/imx7d-pico-pi-u-boot.dtsi
@@ -1,11 +1,12 @@
 #include "imx7s-u-boot.dtsi"
 
 /{
-    aliases {
-        mmc0 = &usdhc3;
-        usb0 = &usbotg1;
-        display0 = &lcdif;
-    };
+       aliases {
+               mmc0 = &usdhc3;
+               mmc1 = &usdhc1;
+               usb0 = &usbotg1;
+               display0 = &lcdif;
+       };
 };
 
 &usbotg1 {
diff --git a/board/technexion/pico-imx7d/Makefile 
b/board/technexion/pico-imx7d/Makefile
index 4ae3d606b5..61b55fcc55 100644
--- a/board/technexion/pico-imx7d/Makefile
+++ b/board/technexion/pico-imx7d/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0+
 # (C) Copyright 2017 NXP Semiconductors
 
-obj-y  := pico-imx7d.o spl.o
+obj-y  := pico-imx7d.o spl.o ../../freescale/common/mmc.o
diff --git a/board/technexion/pico-imx7d/pico-imx7d.c 
b/board/technexion/pico-imx7d/pico-imx7d.c
index 6e98b85b28..157aea6189 100644
--- a/board/technexion/pico-imx7d/pico-imx7d.c
+++ b/board/technexion/pico-imx7d/pico-imx7d.c
@@ -13,6 +13,7 @@
 #include <asm/global_data.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/boot_mode.h>
 #include <asm/io.h>
 #include <common.h>
 #include <miiphy.h>
@@ -25,6 +26,11 @@ DECLARE_GLOBAL_DATA_PTR;
 #define UART_PAD_CTRL  (PAD_CTL_DSE_3P3V_49OHM | \
        PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS)
 
+#define PICO_MMC0 0
+#define PICO_MMC0_BLK 2
+#define PICO_MMC1 1
+#define PICO_MMC1_BLK 0
+
 int dram_init(void)
 {
        gd->ram_size = imx_ddr_size();
@@ -106,7 +112,7 @@ int board_phy_config(struct phy_device *phydev)
 {
        unsigned short val;
 
-       /* To enable AR8035 ouput a 125MHz clk from CLK_25M */
+       /* To enable AR8035 output a 125MHz clk from CLK_25M */
        phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
        phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
        phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
@@ -176,6 +182,12 @@ int board_late_init(void)
 
        set_wdog_reset(wdog);
 
+#if CONFIG_IS_ENABLED(FSL_ESDHC_IMX)
+#if defined(CONFIG_ENV_IS_IN_MMC) || defined(CONFIG_ENV_IS_NOWHERE)
+       board_late_mmc_env_init();
+#endif /* CONFIG_ENV_IS_IN_MMC or CONFIG_ENV_IS_NOWHERE */
+#endif
+
        /*
         * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
         * since we use PMIC_PWRON to reset the board.
@@ -210,3 +222,42 @@ int board_ehci_hcd_init(int port)
        }
        return 0;
 }
+
+int mmc_get_env_dev(void)
+{
+       int dev_no = 0;
+
+       switch (get_boot_device()) {
+       case SD3_BOOT:
+       case MMC3_BOOT:
+               env_set("bootdev", "MMC3");
+               dev_no = PICO_MMC0;
+               break;
+       case SD1_BOOT:
+               env_set("bootdev", "SD1");
+               dev_no = PICO_MMC1;
+               break;
+       default:
+               printf("Wrong boot device!");
+       }
+
+       return dev_no;
+}
+
+int mmc_map_to_kernel_blk(int dev_no)
+{
+       int blk_no = 0;
+
+       switch (dev_no) {
+       case PICO_MMC0:
+               blk_no = PICO_MMC0_BLK;
+               break;
+       case PICO_MMC1:
+               blk_no = PICO_MMC1_BLK;
+               break;
+       default:
+               printf("Invalid MMC device!");
+       }
+
+       return blk_no;
+}
diff --git a/board/technexion/pico-imx7d/spl.c 
b/board/technexion/pico-imx7d/spl.c
index c6b21aaa42..0192eafbaa 100644
--- a/board/technexion/pico-imx7d/spl.c
+++ b/board/technexion/pico-imx7d/spl.c
@@ -15,6 +15,7 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/arch-mx7/mx7-ddr.h>
 #include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/boot_mode.h>
 #include <asm/gpio.h>
 #include <asm/sections.h>
 #include <fsl_esdhc_imx.h>
@@ -159,7 +160,20 @@ void reset_cpu(void)
 #define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
        PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM)
 
-static iomux_v3_cfg_t const usdhc3_pads[] = {
+#define USDHC1_CD_GPIO IMX_GPIO_NR(5, 0)
+/* EMMC/SD */
+static const iomux_v3_cfg_t usdhc1_pads[] = {
+       MX7D_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_SD1_DATA0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_SD1_DATA1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_SD1_DATA2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_SD1_DATA3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+       MX7D_PAD_SD1_CD_B__GPIO5_IO0  | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+};
+
+#define USDHC3_CD_GPIO IMX_GPIO_NR(1, 14)
+static const iomux_v3_cfg_t usdhc3_emmc_pads[] = {
        MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
        MX7D_PAD_SD3_DATA0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
@@ -173,20 +187,83 @@ static iomux_v3_cfg_t const usdhc3_pads[] = {
        MX7D_PAD_GPIO1_IO14__GPIO1_IO14 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
 };
 
-static struct fsl_esdhc_cfg usdhc_cfg[1] = {
+static struct fsl_esdhc_cfg usdhc_cfg[2] = {
        {USDHC3_BASE_ADDR},
+       {USDHC1_BASE_ADDR},
 };
 
 int board_mmc_getcd(struct mmc *mmc)
 {
-       /* Assume uSDHC3 emmc is always present */
-       return 1;
+       struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+       int ret = 0;
+
+       switch (cfg->esdhc_base) {
+       case USDHC1_BASE_ADDR:
+               ret = !gpio_get_value(USDHC1_CD_GPIO);
+               break;
+       case USDHC3_BASE_ADDR:
+               ret = !gpio_get_value(USDHC3_CD_GPIO);
+               break;
+       }
+
+       return ret;
 }
 
 int board_mmc_init(struct bd_info *bis)
 {
-       imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
-       usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
-       return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+       int ret;
+       u32 index;
+
+       /*
+        * Following map is done:
+        * (USDHC)      (Physical Port)
+        * usdhc3       SOM MicroSD/MMC
+        * usdhc1       Carrier board MicroSD
+        * Always set boot USDHC as mmc0
+        */
+
+       imx_iomux_v3_setup_multiple_pads(usdhc3_emmc_pads,
+                                        ARRAY_SIZE(usdhc3_emmc_pads));
+       gpio_direction_input(USDHC3_CD_GPIO);
+
+       imx_iomux_v3_setup_multiple_pads(usdhc1_pads,
+                                        ARRAY_SIZE(usdhc1_pads));
+       gpio_direction_input(USDHC1_CD_GPIO);
+
+       switch (get_boot_device()) {
+       case SD1_BOOT:
+               usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR;
+               usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+               usdhc_cfg[0].max_bus_width = 4;
+               usdhc_cfg[1].esdhc_base = USDHC3_BASE_ADDR;
+               usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+               usdhc_cfg[1].max_bus_width = 4;
+               break;
+       case MMC3_BOOT:
+               usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
+               usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+               usdhc_cfg[0].max_bus_width = 8;
+               usdhc_cfg[1].esdhc_base = USDHC1_BASE_ADDR;
+               usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+               usdhc_cfg[1].max_bus_width = 4;
+               break;
+       case SD3_BOOT:
+       default:
+               usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
+               usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+               usdhc_cfg[0].max_bus_width = 4;
+               usdhc_cfg[1].esdhc_base = USDHC1_BASE_ADDR;
+               usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+               usdhc_cfg[1].max_bus_width = 4;
+               break;
+       }
+
+       for (index = 0; index < CFG_SYS_FSL_USDHC_NUM; ++index) {
+               ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
+               if (ret)
+                       return ret;
+       }
+
+       return 0;
 }
 #endif
diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
index 096e5bbe66..e7a8cb20df 100644
--- a/include/configs/pico-imx7d.h
+++ b/include/configs/pico-imx7d.h
@@ -13,7 +13,7 @@
 #define CFG_MXC_UART_BASE              UART5_IPS_BASE_ADDR
 
 /* MMC Config */
-#define CFG_SYS_FSL_ESDHC_ADDR 0
+#define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
 
 #define CFG_DFU_ENV_SETTINGS \
        "dfu_alt_info=" \
@@ -79,9 +79,11 @@
                "name=rootfs,size=0,uuid=${uuid_gpt_rootfs}\0" \
        "fastboot_partition_alias_system=rootfs\0" \
        "setup_emmc=mmc dev 0; gpt write mmc 0 $partitions; reset;\0" \
+       "mmcautodetect=yes\0" \
        PICO_BOOT_ENV
 
 #define BOOT_TARGET_DEVICES(func) \
+       func(MMC, mmc, 1) \
        func(MMC, mmc, 0) \
        func(USB, usb, 0) \
        func(PXE, pxe, na) \
-- 
2.42.0.windows.2

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