On 11/15/23 18:40, Paul Barker wrote:
This patch allows us to reset the RZ/G2L board via the RAA215300 PMIC.
Note that the RAA215300 documentation names the available reset types
differently to u-boot:
- A "warm" reset via the RAA215300 PMIC will fully reset the SoC
(CPU & GPIOs), so this corresponds to SYSRESET_COLD.
- A "cold" reset via the RAA215300 PMIC will cycle all power supply
rails, so this corresponds to SYSRESET_POWER.
Signed-off-by: Paul Barker <paul.barker...@bp.renesas.com>
---
board/renesas/rzg2l/rzg2l.c | 8 ----
configs/renesas_rzg2l_smarc_defconfig | 2 +
drivers/power/pmic/raa215300.c | 17 ++++++++
drivers/sysreset/Kconfig | 6 +++
drivers/sysreset/Makefile | 1 +
drivers/sysreset/sysreset_raa215300.c | 58 +++++++++++++++++++++++++++
6 files changed, 84 insertions(+), 8 deletions(-)
create mode 100644 drivers/sysreset/sysreset_raa215300.c
diff --git a/board/renesas/rzg2l/rzg2l.c b/board/renesas/rzg2l/rzg2l.c
index 73201a8c69e5..0f6d6e7f514f 100644
--- a/board/renesas/rzg2l/rzg2l.c
+++ b/board/renesas/rzg2l/rzg2l.c
@@ -56,11 +56,3 @@ int board_init(void)
{
return 0;
}
-
-void reset_cpu(void)
-{
- /*
- * TODO: Implement reset support once TrustedFirmware supports
- * the appropriate call.
- */
-}
Board change -- separate patch please.
diff --git a/configs/renesas_rzg2l_smarc_defconfig
b/configs/renesas_rzg2l_smarc_defconfig
index b62eae4ee0a4..ba96e746df9e 100644
--- a/configs/renesas_rzg2l_smarc_defconfig
+++ b/configs/renesas_rzg2l_smarc_defconfig
@@ -55,3 +55,5 @@ CONFIG_PMIC_RAA215300=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_RAA215300=y
diff --git a/drivers/power/pmic/raa215300.c b/drivers/power/pmic/raa215300.c
index 9c0b720994b2..7f68f95f25cf 100644
--- a/drivers/power/pmic/raa215300.c
+++ b/drivers/power/pmic/raa215300.c
@@ -27,9 +27,26 @@ static const struct udevice_id raa215300_ids[] = {
{ /* sentinel */ }
};
+static int raa215300_bind(struct udevice *dev)
+{
+ struct driver *drv;
+
+ if (IS_ENABLED(CONFIG_SYSRESET_RAA215300)) {
+ drv = lists_driver_lookup_name("raa215300_sysreset");
+ if (!drv)
+ return -ENOENT;
+
+ return device_bind(dev, drv, dev->name, NULL, dev_ofnode(dev),
+ NULL);
+ }
+
+ return 0;
+}
Driver change should be squashed in 4/5.
U_BOOT_DRIVER(raa215300_pmic) = {
.name = "raa215300_pmic",
.id = UCLASS_PMIC,
.of_match = raa215300_ids,
+ .bind = raa215300_bind,
.ops = &raa215300_ops,
};
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index 0e52f996283c..49c0787b26d8 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -229,6 +229,12 @@ config SYSRESET_MPC83XX
help
Reboot support for NXP MPC83xx SoCs.
+config SYSRESET_RAA215300
+ bool "Support sysreset via Renesas RAA215300 PMIC"
+ depends on PMIC_RAA215300
+ help
+ Add support for the system reboot via the Renesas RAA215300 PMIC.
+
endif
Sysreset driver should be separate patch .
endmenu
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index c9f1c625aebb..e0e732205df3 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -27,4 +27,5 @@ obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_AT91) += sysreset_at91.o
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o
+obj-$(CONFIG_SYSRESET_RAA215300) += sysreset_raa215300.o
obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
diff --git a/drivers/sysreset/sysreset_raa215300.c
b/drivers/sysreset/sysreset_raa215300.c
new file mode 100644
index 000000000000..32dfcb0aec84
--- /dev/null
+++ b/drivers/sysreset/sysreset_raa215300.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 Renesas Electronics Corporation
+ */
+
+#include <dm.h>
+#include <power/pmic.h>
+#include <sysreset.h>
+
+#define RAA215300_REG_SWRESET 0x6D
+#define RAA215300_COLD_RESET BIT(0)
+#define RAA215300_WARM_RESET BIT(1)
+
+static int raa215300_sysreset_request(struct udevice *dev, enum sysreset_t
type)
+{
+ struct udevice *pmic = dev_get_parent(dev);
+ int ret;
+ u8 val;
+
+ /*
+ * The RAA215300 documentation names the available reset types
+ * differently to u-boot:
+ *
+ * - A "warm" reset via the RAA215300 PMIC will fully reset the SoC
+ * (CPU & GPIOs), so this corresponds to SYSRESET_COLD.
+ *
+ * - A "cold" reset via the RAA215300 PMIC will cycle all power supply
+ * rails, so this corresponds to SYSRESET_POWER.
+ */
+ switch (type) {
+ case SYSRESET_COLD:
+ val = RAA215300_WARM_RESET;
+ break;
+
+ case SYSRESET_POWER:
+ val = RAA215300_COLD_RESET;
+ break;
+
+ default:
+ return -EPROTONOSUPPORT;
+ }
+
+ ret = pmic_reg_write(pmic, RAA215300_REG_SWRESET, val);
+ if (ret)
+ return ret;
+
+ return -EINPROGRESS;
+}
+
+static struct sysreset_ops raa215300_sysreset_ops = {
+ .request = raa215300_sysreset_request,
+};
+
+U_BOOT_DRIVER(raa215300_sysreset) = {
+ .name = "raa215300_sysreset",
+ .id = UCLASS_SYSRESET,
+ .ops = &raa215300_sysreset_ops,
+};
Looks good otherwise.
