On Wed, Dec 13, 2023 at 9:19 PM Michal Simek <michal.si...@amd.com> wrote: > > > > On 12/4/23 09:52, Venkatesh Yadav Abbarapu wrote: > > Add support for ISSI 256MB flash IS25LP02G. This part supports 4byte > > opcodes. It also supports dual and quad read. > > > > Signed-off-by: Sreekanth Sunnam <sreekanth.sun...@amd.com> > > Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbar...@amd.com> > > --- > > Changes in v2: > > - Fixed the name to Sreekanth Sunnam. > > --- > > drivers/mtd/spi/spi-nor-ids.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c > > index 3cb132dcff..9a73198227 100644 > > --- a/drivers/mtd/spi/spi-nor-ids.c > > +++ b/drivers/mtd/spi/spi-nor-ids.c > > @@ -217,6 +217,8 @@ const struct flash_info spi_nor_ids[] = { > > SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > > { INFO("is25lp01g", 0x9d601b, 0, 64 * 1024, 2048, > > SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > > + { INFO("is25lp02g", 0x9d6022, 0, 64 * 1024, 4096, > > + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > > { INFO("is25wp008", 0x9d7014, 0, 64 * 1024, 16, SPI_NOR_QUAD_READ) }, > > { INFO("is25wp016", 0x9d7015, 0, 64 * 1024, 32, SPI_NOR_QUAD_READ) }, > > { INFO("is25wp032", 0x9d7016, 0, 64 * 1024, 64, > > Jagan/Tom: Do you want to take it? Or should I take it via my tree?
Picked on my tree. Jagan.