[PATCH v6 12/18] video: tegra20: dc: parameterize V- and H-sync polarities

[Svyatoslav Ryhel]

Based on Thierry Reding's Linux commit:

'commit 1716b1891e1de05e2c20ccafa9f58550f3539717
("drm/tegra: rgb: Parameterize V- and H-sync polarities")'

Signed-off-by: Svyatoslav Ryhel <clamo...@gmail.com>
---
 arch/arm/include/asm/arch-tegra/dc.h |  5 +++++
 drivers/video/tegra20/tegra-dc.c     | 22 ++++++++++++++++++++--
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-tegra/dc.h 
b/arch/arm/include/asm/arch-tegra/dc.h
index 6444af2993..ca3718411a 100644
--- a/arch/arm/include/asm/arch-tegra/dc.h
+++ b/arch/arm/include/asm/arch-tegra/dc.h
@@ -443,6 +443,11 @@ enum win_color_depth_id {
 #define        WINDOW_D_SELECT         BIT(7)
 #define        WINDOW_H_SELECT         BIT(8)
 
+/* DC_COM_PIN_OUTPUT_POLARITY1 0x307 */
+#define LHS_OUTPUT_POLARITY_LOW                BIT(30)
+#define LVS_OUTPUT_POLARITY_LOW                BIT(28)
+#define LSC0_OUTPUT_POLARITY_LOW       BIT(24)
+
 /* DC_DISP_DISP_WIN_OPTIONS 0x402 */
 #define        CURSOR_ENABLE           BIT(16)
 #define        SOR_ENABLE              BIT(25)
diff --git a/drivers/video/tegra20/tegra-dc.c b/drivers/video/tegra20/tegra-dc.c
index caeec94468..ffa81eeac3 100644
--- a/drivers/video/tegra20/tegra-dc.c
+++ b/drivers/video/tegra20/tegra-dc.c
@@ -220,8 +220,11 @@ static const u32 rgb_sel_tab[PIN_OUTPUT_SEL_COUNT] = {
        0x00020000,
 };
 
-static void rgb_enable(struct dc_com_reg *com)
+static void rgb_enable(struct tegra_lcd_priv *priv)
 {
+       struct dc_com_reg *com = &priv->dc->com;
+       struct display_timing *dt = &priv->timing;
+       u32 value;
        int i;
 
        for (i = 0; i < PIN_REG_COUNT; i++) {
@@ -230,6 +233,21 @@ static void rgb_enable(struct dc_com_reg *com)
                writel(rgb_data_tab[i], &com->pin_output_data[i]);
        }
 
+       /* configure H- and V-sync signal polarities */
+       value = readl(&com->pin_output_polarity[1]);
+
+       if (dt->flags & DISPLAY_FLAGS_HSYNC_LOW)
+               value |= LHS_OUTPUT_POLARITY_LOW;
+       else
+               value &= ~LHS_OUTPUT_POLARITY_LOW;
+
+       if (dt->flags & DISPLAY_FLAGS_VSYNC_LOW)
+               value |= LVS_OUTPUT_POLARITY_LOW;
+       else
+               value &= ~LVS_OUTPUT_POLARITY_LOW;
+
+       writel(value, &com->pin_output_polarity[1]);
+
        for (i = 0; i < PIN_OUTPUT_SEL_COUNT; i++)
                writel(rgb_sel_tab[i], &com->pin_output_sel[i]);
 }
@@ -329,7 +347,7 @@ static int tegra_display_probe(struct tegra_lcd_priv *priv,
                basic_init_timer(&priv->dc->disp);
 
        if (priv->soc->has_rgb)
-               rgb_enable(&priv->dc->com);
+               rgb_enable(priv);
 
        if (priv->pixel_clock)
                update_display_mode(priv);
-- 
2.40.1