On Thu, Feb 01, 2024 at 02:30:14PM +0100, Ludwig Kormann wrote: > This option can be used to modify the initial SPL > CPU clock frequency. > > This follows an earlier discussion regarding A20 > CPUs dying after reboot in SPL initialization due to > incompatible CPU clock frequency and core voltage. [1] > > First attempt was to update PLL1_CFG_DEFAULT to a fixed > lower frequency (144MHz), which fixed the observed issue > but might not suit all A20 users. A KConfig option > should be the better solution. > > [1] > https://lists.denx.de/pipermail/u-boot/2024-January/544897.html > > Signed-off-by: Ludwig Kormann <ludwig.korm...@ict42.de> [snip] > +if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I > +config SPL_SYS_CLK_FREQ > + int "sunxi SPL CPU clock frequency" > + default 384 > + ---help--- > + A static value for the sunxi SPL CPU frequency, must be a multiple of 24. > +endif
This should really just be "depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I" and then "help". -- Tom
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