Add few SMEM related defines that will be used for
IPQ9574 based boards.

Signed-off-by: Varadarajan Narayanan <quic_var...@quicinc.com>
---

 include/smem.h | 78 ++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 78 insertions(+)

diff --git a/include/smem.h b/include/smem.h
index b19c534ebc..f305354996 100644
--- a/include/smem.h
+++ b/include/smem.h
@@ -16,6 +16,84 @@
 #ifndef _smemh_
 #define _smemh_
 
+enum {
+       SMEM_SPINLOCK_ARRAY             = 7,
+       SMEM_AARM_PARTITION_TABLE       = 9,
+       SMEM_HW_SW_BUILD_ID             = 137,
+       SMEM_USABLE_RAM_PARTITION_TABLE = 402,
+       SMEM_POWER_ON_STATUS_INFO       = 403,
+       SMEM_MACHID_INFO_LOCATION       = 425,
+       SMEM_IMAGE_VERSION_TABLE        = 469,
+       SMEM_BOOT_FLASH_TYPE            = 498,
+       SMEM_BOOT_FLASH_INDEX           = 499,
+       SMEM_BOOT_FLASH_CHIP_SELECT     = 500,
+       SMEM_BOOT_FLASH_BLOCK_SIZE      = 501,
+       SMEM_BOOT_FLASH_DENSITY         = 502,
+       SMEM_BOOT_DUALPARTINFO          = 503,
+       SMEM_PARTITION_TABLE_OFFSET     = 504,
+       SMEM_SPI_FLASH_ADDR_LEN         = 505,
+       SMEM_FIRST_VALID_TYPE           = SMEM_SPINLOCK_ARRAY,
+       SMEM_LAST_VALID_TYPE            = SMEM_SPI_FLASH_ADDR_LEN,
+       SMEM_MAX_SIZE                   = SMEM_SPI_FLASH_ADDR_LEN + 1,
+};
+
+enum {
+       SMEM_BOOT_NO_FLASH              = 0,
+       SMEM_BOOT_NOR_FLASH             = 1,
+       SMEM_BOOT_NAND_FLASH            = 2,
+       SMEM_BOOT_ONENAND_FLASH         = 3,
+       SMEM_BOOT_SDC_FLASH             = 4,
+       SMEM_BOOT_MMC_FLASH             = 5,
+       SMEM_BOOT_SPI_FLASH             = 6,
+       SMEM_BOOT_NORPLUSNAND           = 7,
+       SMEM_BOOT_NORPLUSEMMC           = 8,
+       SMEM_BOOT_QSPI_NAND_FLASH       = 11,
+};
+
+#define BUILD_ID_LEN                   32
+#define SOCINFO_VERSION_MAJOR(ver)     (((ver) & 0xffff0000) >> 16)
+#define SOCINFO_VERSION_MINOR(ver)     ((ver) & 0x0000ffff)
+
+struct smem_pmic_type {
+       unsigned int pmic_model;
+       unsigned int pmic_die_revision;
+};
+
+struct ipq_platform_v1 {
+       unsigned int    format;
+       unsigned int    id;
+       unsigned int    version;
+       char            build_id[BUILD_ID_LEN];
+       unsigned int    raw_id;
+       unsigned int    raw_version;
+       unsigned int    hw_platform;
+       unsigned int    platform_version;
+       unsigned int    accessory_chip;
+       unsigned int    hw_platform_subtype;
+};
+
+struct ipq_platform_v2 {
+       struct ipq_platform_v1  v1;
+       struct smem_pmic_type   pmic_info[3];
+       unsigned int            foundry_id;
+};
+
+struct ipq_platform_v3 {
+       struct ipq_platform_v2  v2;
+       unsigned int            chip_serial;
+};
+
+union ipq_platform {
+       struct ipq_platform_v1  v1;
+       struct ipq_platform_v2  v2;
+       struct ipq_platform_v3  v3;
+};
+
+struct smem_machid_info {
+       unsigned int format;
+       unsigned int machid;
+};
+
 /* struct smem_ops: Operations for the SMEM uclass */
 struct smem_ops {
        /**
-- 
2.34.1

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