> -----Original Message----- > From: Clint Adams [mailto:cl...@debian.org] > Sent: Thursday, April 07, 2011 12:25 AM > To: u-boot@lists.denx.de > Cc: Prafulla Wadaskar; julian.pidan...@citrix.com; Clint Adams > Subject: [PATCH 2/2] Initialize second PHY on OpenRD-Client and OpenRD- > Ultimate. > > (rework of Julian Pidancet's patch) > --- > board/Marvell/openrd_base/openrd_base.c | 22 ++++++++++++++++++---- > include/configs/openrd_base.h | 14 ++++++++++++-- > 2 files changed, 30 insertions(+), 6 deletions(-) > > diff --git a/board/Marvell/openrd_base/openrd_base.c > b/board/Marvell/openrd_base/openrd_base.c > index 10109c1..aea4760 100644 > --- a/board/Marvell/openrd_base/openrd_base.c > +++ b/board/Marvell/openrd_base/openrd_base.c > @@ -118,12 +118,11 @@ int board_init(void) > } > > #ifdef CONFIG_RESET_PHY_R > -/* Configure and enable MV88E1116 PHY */ > -void reset_phy(void) > +/* Configure and enable MV88E1116/88E1121 PHY */ > +void mv_phy_init(char *name) > { > u16 reg; > u16 devadr; > - char *name = "egiga0"; > > if (miiphy_set_current_dev(name)) > return; > @@ -148,6 +147,21 @@ void reset_phy(void) > /* reset the phy */ > miiphy_reset(name, devadr); > > - printf("88E1116 Initialized on %s\n", name); > + printf(PHY_NO" Initialized on %s\n", name); > +} > + > +void reset_phy(void) > +{ > + mv_phy_init("egiga0"); > + > +#ifdef CONFIG_BOARD_IS_OPENRD_CLIENT > + /* Kirkwood ethernet driver is written with the assumption that > in case > + * of multiple PHYs, their addresses are consecutive. But > unfortunately > + * in case of OpenRD-Client, PHY addresses are not > consecutive.*/ > + miiphy_write("egiga1", 0xEE, 0xEE, 24); > + > + /* configure and initialize both PHY's */ > + mv_phy_init("egiga1"); > +#endif > } > #endif /* CONFIG_RESET_PHY_R */ > diff --git a/include/configs/openrd_base.h > b/include/configs/openrd_base.h > index 5e05890..aa13908 100644 > --- a/include/configs/openrd_base.h > +++ b/include/configs/openrd_base.h > @@ -117,8 +117,18 @@ > * Ethernet Driver configuration > */ > #ifdef CONFIG_CMD_NET > -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ > -#define CONFIG_PHY_BASE_ADR 0x8 > +# ifdef CONFIG_BOARD_IS_OPENRD_BASE > +# define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ > +# else > +# define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ > +# endif > +# ifdef CONFIG_BOARD_IS_OPENRD_ULTIMATE > +# define CONFIG_PHY_BASE_ADR 0x0 > +# define PHY_NO "88E1121" > +# else > +# define CONFIG_PHY_BASE_ADR 0x8 > +# define PHY_NO "88E1116" > +# endif > #endif /* CONFIG_CMD_NET */ >
This looks pretty good. Ack for both the patches. Regards.. Prafulla .. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
