On Fri, 22 Mar 2024 at 00:47, Marek Vasut <ma...@denx.de> wrote: > > On 3/21/24 1:40 PM, Sumit Garg wrote: > > On Thu, 14 Mar 2024 at 09:46, Marek Vasut <ma...@denx.de> wrote: > >> > >> On 3/12/24 8:03 AM, Sumit Garg wrote: > >>> Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe > >>> PHY initialization moved to this standalone PHY driver. > >>> > >>> Inspired from counterpart Linux kernel v6.8-rc3 driver: > >>> drivers/phy/freescale/phy-fsl-imx8m-pcie.c. Use last Linux kernel driver > >>> reference commit 7559e7572c03 ("phy: Explicitly include correct DT > >>> includes"). > >> > >> [...] > >> > >>> +static int imx8_pcie_phy_probe(struct udevice *dev) > >>> +{ > >>> + struct imx8_pcie_phy *imx8_phy = dev_get_priv(dev); > >>> + ofnode gpr; > >>> + int ret = 0; > >>> + > >>> + imx8_phy->drvdata = (void *)dev_get_driver_data(dev); > >>> + imx8_phy->base = dev_read_addr(dev); > >>> + if (!imx8_phy->base) > >>> + return -EINVAL; > >>> + > >>> + /* get PHY refclk pad mode */ > >>> + dev_read_u32(dev, "fsl,refclk-pad-mode", > >>> &imx8_phy->refclk_pad_mode); > >>> + > >>> + imx8_phy->tx_deemph_gen1 = dev_read_u32_default(dev, > >>> + > >>> "fsl,tx-deemph-gen1", > >>> + 0); > >>> + imx8_phy->tx_deemph_gen2 = dev_read_u32_default(dev, > >>> + > >>> "fsl,tx-deemph-gen2", > >>> + 0); > >>> + imx8_phy->clkreq_unused = dev_read_bool(dev, > >>> "fsl,clkreq-unsupported"); > >>> + > >>> + /* Grab GPR config register range */ > >>> + gpr = ofnode_by_compatible(ofnode_null(), imx8_phy->drvdata->gpr); > >>> + if (ofnode_equal(gpr, ofnode_null())) { > >>> + dev_err(dev, "unable to find GPR node\n"); > >>> + return -ENODEV; > >>> + } > >>> + > >>> + imx8_phy->iomuxc_gpr = syscon_node_to_regmap(gpr); > >>> + if (IS_ERR(imx8_phy->iomuxc_gpr)) { > >>> + dev_err(dev, "unable to find iomuxc registers\n"); > >>> + return PTR_ERR(imx8_phy->iomuxc_gpr); > >>> + } > >> > >> syscon_regmap_lookup_by_compatible() should simplify these two steps ^ . > >> > > > > After a close look, that API isn't supported by U-Boot yet. So I will > > keep the existing implementation with your review tag. I hope that's > > fine with you. > > Oh, uh, I had a local patch from previous round of PCIe experiments, I > just sent it out, you are on CC. Can you do a follow up fix once this > series V4 is in ?
Sure I can do that as a followup once your patch is merged. -Sumit