The commit 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks
read in a single command") introduced a limit of number of blocks to
read to fix a Data End Bit Error on RK3568 and RK3588. This had a side
affect of significant slowing down reading FIT from eMMC.

After the commit 6de9d7b2f13c ("rockchip: rk35xx: Enable eMMC HS200 mode
by default") the limit of number of blocks to read workaround is no
longer necessary and a Data End Bit Error is no longer happening using
PIO mode.

Revert this limitation to allow reading more than 4 blocks with a single
CMD18 command in PIO mode and speed up reading FIT from eMMC.

Signed-off-by: Jonas Karlman <jo...@kwiboo.se>
---
This is a replacement for the prior [1] "mmc: rockchip_sdhci: Use bounce
buffer in SPL to fix read performance" patch.

[1] https://patchwork.ozlabs.org/patch/1895377/
---
 drivers/mmc/rockchip_sdhci.c | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 706fb1235796..45587222a230 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -598,16 +598,6 @@ static int rockchip_sdhci_probe(struct udevice *dev)
            dev_read_bool(dev, "u-boot,spl-fifo-mode"))
                host->flags &= ~USE_DMA;
 
-       /*
-        * Reading more than 4 blocks with a single CMD18 command in PIO mode
-        * triggers Data End Bit Error on RK3568 and RK3588. Limit to reading
-        * max 4 blocks in one command when using PIO mode.
-        */
-       if (!(host->flags & USE_DMA) &&
-           (device_is_compatible(dev, "rockchip,rk3568-dwcmshc") ||
-            device_is_compatible(dev, "rockchip,rk3588-dwcmshc")))
-               cfg->b_max = 4;
-
        return sdhci_probe(dev);
 }
 
-- 
2.43.2

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